| /external/llvm/include/llvm/Support/ |
| LEB128.h | 27 // NOTE: this assumes that this signed shift is an arithmetic right shift.
83 unsigned Shift = 0;
85 Value += (*p & 0x7f) << Shift;
86 Shift += 7;
|
| MathExtras.h | 59 T Shift = std::numeric_limits<T>::digits >> 1;
60 T Mask = std::numeric_limits<T>::max() >> Shift;
61 while (Shift) {
63 Val >>= Shift;
64 ZeroBits |= Shift;
66 Shift >>= 1;
67 Mask >>= Shift;
128 for (T Shift = std::numeric_limits<T>::digits >> 1; Shift; Shift >>= 1)
[all...] |
| ScaledNumber.h | 89 // Shift right and round.
90 int Shift = 64 - Width - countLeadingZeros(Digits);
91 return getRounded<DigitsT>(Digits >> Shift, Scale + Shift,
92 Digits & (UINT64_C(1) << (Shift - 1)));
278 /// scales in place. Shift the digits as necessary to form equivalent numbers,
308 // Shift LDigits left as much as possible, then shift RDigits right.
310 assert(ShiftL < getWidth<DigitsT>() && "can't shift more than width");
625 ScaledNumber &operator<<=(int16_t Shift) {
[all...] |
| /art/runtime/base/ |
| bit_field.h | 48 // Returns the shift count needed to right-shift the bit field to
50 static int Shift() {
|
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsMCCodeEmitter.cpp | 51 // If the D<shift> instruction has a shift amount that is greater
52 // than 31 (checked in calling routine), lower it to a D<shift>32 instruction
55 assert(Inst.getNumOperands() == 3 && "Invalid no. of operands for shift!");
58 int64_t Shift = Inst.getOperand(2).getImm();
59 if (Shift <= 31)
61 Shift -= 32;
64 Inst.getOperand(2).setImm(Shift);
69 llvm_unreachable("Unexpected shift instruction");
136 unsigned Shift = IsLittleEndian ? i * 8 : (Size - 1 - i) * 8
[all...] |
| /external/clang/include/clang/Basic/ |
| OperatorPrecedence.h | 39 Shift = 11, // <<, >>
|
| /external/llvm/lib/Support/ |
| ScaledNumber.cpp | 46 // Shift as little as possible to maximize precision.
48 int Shift = 64 - LeadingZeros;
50 Upper = Upper << LeadingZeros | Lower >> Shift;
51 return getRounded(Upper, Shift,
52 Shift && (Lower & UINT64_C(1) << (Shift - 1)));
64 int Shift = 0;
66 Shift -= Zeros;
74 return getAdjusted<uint32_t>(Quotient, Shift);
77 return getRounded<uint32_t>(Quotient, Shift, Remainder >= getHalf(Divisor))
[all...] |
| /external/lzma/C/ |
| Ppmd.h | 21 #define PPMD_GET_MEAN_SPEC(summ, shift, round) (((summ) + (1 << ((shift) - (round)))) >> (shift))
36 Byte Shift; /* Speed of Freq change; low Shift is for fast change */
37 Byte Count; /* Count to next change of Shift */
40 #define Ppmd_See_Update(p) if ((p)->Shift < PPMD_PERIOD_BITS && --(p)->Count == 0) \
41 { (p)->Summ <<= 1; (p)->Count = (Byte)(3 << (p)->Shift++); }
|
| /external/clang/lib/Format/ |
| WhitespaceManager.cpp | 212 int Shift = 0;
214 Shift = Column - Changes[i].StartOfTokenColumn;
217 Shift = Changes[i].IndentationOffset +
221 assert(Shift >= 0);
222 Changes[i].Spaces += Shift;
224 Changes[i + 1].PreviousEndOfTokenColumn += Shift;
225 Changes[i].StartOfTokenColumn += Shift;
|
| /external/chromium_org/third_party/WebKit/Source/devtools/front_end/ui/ |
| KeyboardShortcut.js | 43 Shift: 1,
54 // Option on Mac, Shift on other platforms
55 return WebInspector.isMac() ? this.Alt : this.Shift;
67 Shift: { code: 16, name: { mac: "\u21e7", other: "Shift" } },
152 modifiers |= WebInspector.KeyboardShortcut.Modifiers.Shift;
233 modifiers |= WebInspector.KeyboardShortcut.Modifiers.Shift;
296 if (modifiers & WebInspector.KeyboardShortcut.Modifiers.Shift)
297 res += isMac ? shiftKey : "Shift + ";
|
| /external/chromium_org/third_party/WebKit/Source/wtf/dtoa/ |
| fixed-dtoa.cc | 63 void Shift(int shift_amount) {
271 fractionals128.Shift(-exponent - 64);
|
| /external/chromium_org/third_party/angle/util/ |
| Event.h | 33 bool Shift;
|
| /external/chromium_org/v8/src/compiler/arm/ |
| instruction-selector-arm-unittest.cc | 61 struct Shift {
66 AddressingMode i_mode; // Operand2_R_<shift>_I
67 AddressingMode r_mode; // Operand2_R_<shift>_R
71 std::ostream& operator<<(std::ostream& os, const Shift& shift) {
72 return os << shift.constructor_name;
76 static const Shift kShifts[] = {
166 TRACED_FOREACH(Shift, shift, kShifts) {
170 (m.*shift.constructor)(m.Parameter(1), m.Parameter(2))))
991 const Shift shift = GetParam(); local
1004 const Shift shift = GetParam(); local
1020 const Shift shift = GetParam(); local
1053 const Shift shift = GetParam(); local
1088 const Shift shift = GetParam(); local
1105 const Shift shift = GetParam(); local
1125 const Shift shift = GetParam(); local
1138 const Shift shift = GetParam(); local
1155 const Shift shift = GetParam(); local
1169 const Shift shift = GetParam(); local
[all...] |
| /external/chromium_org/v8/src/ |
| fixed-dtoa.cc | 41 void Shift(int shift_amount) {
249 fractionals128.Shift(-exponent - 64);
|
| /external/lldb/source/Interpreter/ |
| Args.cpp | 458 Args::Shift ()
[all...] |
| /external/lldb/source/Plugins/Process/Utility/ |
| ARMUtils.h | 31 //assert(0 && "Invalid shift type");
82 //assert(0 && "Invalid shift type");
261 static inline uint32_t Shift(const uint32_t value, ARM_ShifterType type, const uint32_t amount,
283 static uint32_t ror(uint32_t val, uint32_t N, uint32_t shift)
285 uint32_t m = shift % N;
|
| /external/llvm/lib/Analysis/ |
| BlockFrequencyInfoImpl.cpp | 189 static uint64_t shiftRightAndRound(uint64_t N, int Shift) {
190 assert(Shift >= 0);
191 assert(Shift < 64);
192 if (!Shift)
194 return (N >> Shift) + (UINT64_C(1) & N >> (Shift - 1));
212 // Determine how much to shift right so that the total fits into 32-bits.
214 // If we shift at all, shift by 1 extra. Otherwise, the lower limit of 1
216 int Shift = 0
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 438 SDValue Shift = DAG.getConstant(shiftBits, DVT);
439 // Shift left by 'Shift' bits.
440 Data = DAG.getNode(ISD::SHL, DL, DVT, Data, Shift);
441 // Signed shift Right by 'Shift' bits.
442 Data = DAG.getNode(ISD::SRA, DL, DVT, Data, Shift);
|
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineShifts.cpp | 28 // See if we can fold away this shift.
42 // X shift (A srem B) -> X shift (A and B-1) iff B is a power of 2.
79 // If this is the opposite shift, we can directly reuse the input of the shift
81 // the value which means that we don't care if the shift has multiple uses.
82 // TODO: Handle opposite shift by exact value.
118 // We can often fold the shift into shifts-by-a-constant.
142 // We can often fold the shift into shifts-by-a-constant.
222 // If this is oversized composite shift, then unsigned shifts get 0
[all...] |
| InstCombinePHI.cpp | 417 // Can fold binop, compare or shift here if the RHS is a constant,
558 unsigned Shift; // The amount shifted.
562 : PHIId(pn), Shift(Sh), Inst(User) {}
567 if (Shift < RHS.Shift) return true;
568 if (Shift > RHS.Shift) return false;
576 unsigned Shift; // The amount shifted.
580 : PN(pn), Shift(Sh), Width(Ty->getPrimitiveSizeInBits()) {}
584 : PN(pn), Shift(Sh), Width(0) {
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 438 SDValue Shift = DAG.getConstant(shiftBits, DVT);
439 // Shift left by 'Shift' bits.
440 Data = DAG.getNode(ISD::SHL, DL, DVT, Data, Shift);
441 // Signed shift Right by 'Shift' bits.
442 Data = DAG.getNode(ISD::SRA, DL, DVT, Data, Shift);
|
| /external/chromium_org/third_party/WebKit/Source/devtools/front_end/source_frame/ |
| CodeMirrorTextEditor.js | 69 "Shift-Tab": "indentLess",
79 "Shift-Ctrl-Z": "redoAndReveal",
89 "Shift-Alt-Left": "selectCamelLeft",
90 "Shift-Alt-Right": "selectCamelRight",
102 "Shift-Cmd-Z": "redoAndReveal",
109 "Shift-Ctrl-Left": "selectCamelLeft",
110 "Shift-Ctrl-Right": "selectCamelRight",
220 * @param {boolean} shift
223 WebInspector.CodeMirrorTextEditor.moveCamelLeftCommand = function(shift, codeMirror)
225 codeMirror._codeMirrorTextEditor._doCamelCaseMovement(-1, shift);
[all...] |
| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| AArch64InstPrinter.cpp | 111 // instruction. In all cases the immediate shift amount shift must be in
115 int shift = 0; local
120 shift = 31 - imms;
124 shift = 63 - imms;
127 shift = immr;
130 shift = immr;
133 shift = immr;
136 shift = immr;
140 << ", " << getRegisterName(Op1.getReg()) << ", #" << shift;
[all...] |
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMMCCodeEmitter.cpp | 203 /// getShiftOp - Return the shift opcode (bit[6:5]) of the immediate value.
408 unsigned Shift = IsLittleEndian ? i * 8 : (Size - 1 - i) * 8;
409 EmitByte((Val >> Shift) & 0xff, OS);
[all...] |
| /external/llvm/lib/Transforms/Utils/ |
| IntegerDivision.cpp | 37 ConstantInt *Shift;
40 Shift = Builder.getInt64(63);
43 Shift = Builder.getInt32(31);
46 // Following instructions are generated for both i32 (shift 31) and
47 // i64 (shift 63).
58 Value *DividendSign = Builder.CreateAShr(Dividend, Shift);
59 Value *DivisorSign = Builder.CreateAShr(Divisor, Shift);
109 ConstantInt *Shift;
112 Shift = Builder.getInt64(63);
115 Shift = Builder.getInt32(31)
[all...] |
