/external/llvm/lib/Target/MSP430/ |
MSP430ISelLowering.cpp | 282 SmallVectorImpl<CCValAssign> &ArgLocs, 336 SmallVectorImpl<CCValAssign>::iterator B = ArgLocs.begin() + FirstVal; 439 SmallVector<CCValAssign, 16> ArgLocs; 441 getTargetMachine(), ArgLocs, *DAG.getContext()); 442 AnalyzeArguments(CCInfo, ArgLocs, Ins); 450 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 451 CCValAssign &VA = ArgLocs[i]; 585 SmallVector<CCValAssign, 16> ArgLocs; 587 getTargetMachine(), ArgLocs, *DAG.getContext()); 588 AnalyzeArguments(CCInfo, ArgLocs, Outs) [all...] |
/art/compiler/dex/quick/mips/ |
call_mips.cc | 289 void MipsMir2Lir::GenEntrySequence(RegLocation* ArgLocs, RegLocation rl_method) { 350 FlushIns(ArgLocs, rl_method);
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codegen_mips.h | 115 void GenEntrySequence(RegLocation* ArgLocs, RegLocation rl_method);
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/art/compiler/dex/quick/x86/ |
call_x86.cc | 206 void X86Mir2Lir::GenEntrySequence(RegLocation* ArgLocs, RegLocation rl_method) { 286 FlushIns(ArgLocs, rl_method);
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codegen_x86.h | 233 void GenEntrySequence(RegLocation* ArgLocs, RegLocation rl_method) OVERRIDE; 328 void FlushIns(RegLocation* ArgLocs, RegLocation rl_method) OVERRIDE; [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | 351 SmallVector<CCValAssign, 16> ArgLocs; 353 getTargetMachine(), ArgLocs, *DAG.getContext()); 359 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i, ++InIdx) { 360 CCValAssign &VA = ArgLocs[i]; 383 CCValAssign &NextVA = ArgLocs[++i]; 551 SmallVector<CCValAssign, 16> ArgLocs; 553 getTargetMachine(), ArgLocs, *DAG.getContext()); 559 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 560 CCValAssign &VA = ArgLocs[i]; 700 SmallVector<CCValAssign, 16> ArgLocs; [all...] |
/art/compiler/dex/quick/arm64/ |
call_arm64.cc | 305 void Arm64Mir2Lir::GenEntrySequence(RegLocation* ArgLocs, RegLocation rl_method) { 402 FlushIns(ArgLocs, rl_method);
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codegen_arm64.h | 181 void GenEntrySequence(RegLocation* ArgLocs, RegLocation rl_method) OVERRIDE; 235 void FlushIns(RegLocation* ArgLocs, RegLocation rl_method) OVERRIDE;
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target_arm64.cc | 908 * ArgLocs is an array of location records describing the incoming arguments 911 void Arm64Mir2Lir::FlushIns(RegLocation* ArgLocs, RegLocation rl_method) { 939 RegLocation* t_loc = &ArgLocs[i]; [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonISelLowering.cpp | 429 SmallVector<CCValAssign, 16> ArgLocs; 431 getTargetMachine(), ArgLocs, *DAG.getContext(), 447 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i){ 448 CCValAssign &VA = ArgLocs[i]; 472 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 473 CCValAssign &VA = ArgLocs[i]; 845 SmallVector<CCValAssign, 16> ArgLocs; 847 getTargetMachine(), ArgLocs, *DAG.getContext()); 860 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 861 CCValAssign &VA = ArgLocs[i] [all...] |
/art/compiler/dex/quick/arm/ |
call_arm.cc | 340 void ArmMir2Lir::GenEntrySequence(RegLocation* ArgLocs, RegLocation rl_method) { 462 FlushIns(ArgLocs, rl_method);
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codegen_arm.h | 116 void GenEntrySequence(RegLocation* ArgLocs, RegLocation rl_method);
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/external/llvm/lib/Target/XCore/ |
XCoreISelLowering.cpp | [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCFastISel.cpp | [all...] |
/external/llvm/lib/Target/SystemZ/ |
SystemZISelLowering.cpp | 680 SmallVector<CCValAssign, 16> ArgLocs; 681 CCState CCInfo(CallConv, IsVarArg, MF, DAG.getTarget(), ArgLocs, 687 for (unsigned I = 0, E = ArgLocs.size(); I != E; ++I) { 689 CCValAssign &VA = ArgLocs[I]; 786 SmallVectorImpl<CCValAssign> &ArgLocs) { 789 for (unsigned I = 0, E = ArgLocs.size(); I != E; ++I) { 790 CCValAssign &VA = ArgLocs[I]; 819 SmallVector<CCValAssign, 16> ArgLocs; 820 CCState ArgCCInfo(CallConv, IsVarArg, MF, DAG.getTarget(), ArgLocs, 826 if (IsTailCall && !canUseSiblingCall(ArgCCInfo, ArgLocs)) [all...] |
/external/llvm/lib/Target/ARM/ |
ARMFastISel.cpp | [all...] |
ARMISelLowering.cpp | [all...] |
/external/llvm/lib/Target/Mips/ |
MipsISelLowering.cpp | [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64FastISel.cpp | [all...] |
AArch64ISelLowering.cpp | [all...] |
/external/llvm/lib/Target/R600/ |
SIISelLowering.cpp | 364 SmallVector<CCValAssign, 16> ArgLocs; 366 getTargetMachine(), ArgLocs, *DAG.getContext()); 397 CCValAssign &VA = ArgLocs[ArgIdx++]; 438 Reg = ArgLocs[ArgIdx++].getLocReg(); [all...] |
/art/compiler/dex/quick/ |
mir_to_lir.h | [all...] |
gen_invoke.cc | 366 * ArgLocs is an array of location records describing the incoming arguments 369 void Mir2Lir::FlushIns(RegLocation* ArgLocs, RegLocation rl_method) { 411 RegLocation* t_loc = &ArgLocs[i]; [all...] |
/external/clang/lib/Sema/ |
SemaTemplateInstantiateDecl.cpp | [all...] |
/external/llvm/lib/Target/X86/ |
X86FastISel.cpp | [all...] |