| /external/libhevc/decoder/arm/ |
| ihevcd_fmt_conv_420sp_to_rgba8888.s | 226 VQMOVUN.S16 D14,Q7
231 VZIP.8 D14,D15
248 VST1.32 D14,[R2]!
257 @//D14-D20 - TOALLY HAVE 16 VALUES
277 VQMOVUN.S16 D14,Q7
282 VZIP.8 D14,D15
299 VST1.32 D14,[R8]!
357 VQMOVUN.S16 D14,Q7
362 VZIP.8 D14,D15
379 VST1.32 D14,[R2]
[all...] |
| /art/compiler/utils/mips/ |
| constants_mips.h | 46 D14 = 14,
|
| /external/llvm/test/MC/MachO/ |
| x86_32-symbols.s | 47 D14:
813 // CHECK: ('_string', 'D14')
|
| /external/libhevc/common/arm/ |
| ihevc_sao_edge_offset_class0_chroma.s | 176 VMOV.8 D14[0],r11 @pu1_cur_row_tmp = vsetq_lane_u8(pu1_src_cpy[16], pu1_cur_row_tmp, 0)
184 VMOV.8 D14[1],r11 @pu1_cur_row_tmp = vsetq_lane_u8(pu1_src_cpy[17], pu1_cur_row_tmp, 1)
203 VTBL.8 D14,{D10},D14 @vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
211 VUZP.8 D14,D15
214 VTBL.8 D16,{D11},D14 @offset = vtbl1_s8(offset_tbl_u, vget_low_s8(edge_idx))
239 VMOVN.I16 D14,Q9 @vmovn_s16(pi2_tmp_cur_row.val[0])
261 VST1.8 {D14,D15},[r12],r1 @vst1q_u8(pu1_src_cpy, pu1_cur_row)
336 VMOV.8 D14[0],r11 @pu1_cur_row_tmp = vsetq_lane_u8(pu1_src_cpy[16], pu1_cur_row_tmp, 0)
343 VMOV.8 D14[1],r11 @pu1_cur_row_tmp = vsetq_lane_u8(pu1_src_cpy[17], pu1_cur_row_tmp, 1
[all...] |
| ihevc_sao_band_offset_chroma.s | 166 VCLE.U8 D14,D3,D30 @vcle_u8(band_table.val[2], vdup_n_u8(16))
168 VORR.U8 D3,D3,D14 @band_table.val[2] = vorr_u8(band_table.val[2], au1_cmp)
180 VAND.U8 D3,D3,D14 @band_table.val[2] = vand_u8(band_table.val[2], au1_cmp)
207 VADD.I8 D14,D10,D30 @band_table_v.val[1] = vadd_u8(band_table_v.val[1], band_pos_v)
219 VADD.I8 D10,D14,D28 @band_table_v.val[1] = vadd_u8(band_table_v.val[1], vdup_n_u8(pi1_sao_offset_v[2]))
289 VLD2.8 {D13,D14},[r5] @vld1q_u8(pu1_src_cpy)
299 VSUB.I8 D16,D14,D30 @vsub_u8(au1_cur_row_deint.val[1], band_pos_v)
307 VTBX.8 D14,{D9-D12},D16 @vtbx4_u8(au1_cur_row_deint.val[1], band_table_v, vsub_u8(au1_cur_row_deint.val[1], band_pos_v))
316 VST2.8 {D13,D14},[r5] @vst1q_u8(pu1_src_cpy, au1_cur_row)
343 VLD2.8 {D13,D14},[r5] @vld1q_u8(pu1_src_cpy
[all...] |
| ihevc_sao_edge_offset_class0.s | 173 VMOV.8 D14[0],r11 @pu1_cur_row_tmp = vsetq_lane_u8(pu1_src_cpy[16], pu1_cur_row_tmp, 0)
202 VTBL.8 D14,{D10},D14 @vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
210 VTBL.8 D16,{D11},D14 @offset = vtbl1_s8(offset_tbl, vget_low_s8(edge_idx))
302 VMOV.8 D14[0],r11 @pu1_cur_row_tmp = vsetq_lane_u8(pu1_src_cpy[16], pu1_cur_row_tmp, 0)
|
| ihevc_sao_band_offset_luma.s | 200 VSUB.I8 D14,D13,D31 @vsub_u8(au1_cur_row, band_pos)
202 VTBX.8 D13,{D1-D4},D14 @vtbx4_u8(au1_cur_row, band_table, vsub_u8(au1_cur_row, band_pos))
|
| ihevc_sao_edge_offset_class2_chroma.s | 393 VMOV.8 D14[0],r8 @I sign_up = sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[0] - pu1_src_left_cpy[(ht_tmp - 1 - row) * 2]), sign_up, 0)
397 VMOV.8 D14[1],r4 @I sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[1] - pu1_src_left_cpy[(ht_tmp - 1 - row) * 2 + 1]), sign_up, 1)
479 VMOV.8 D14[0],r8 @II sign_up = sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[0] - pu1_src_left_cpy[(ht_tmp - 1 - row) * 2]), sign_up, 0)
495 VMOV.8 D14[1],r11 @II sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[1] - pu1_src_left_cpy[(ht_tmp - 1 - row) * 2 + 1]), sign_up, 1)
521 VMOV.8 d14[0],r4 @III sign_up = sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[0] - pu1_src_left_cpy[(ht_tmp - 1 - row) * 2]), sign_up, 0)
532 VMOV.8 D14[1],r10 @III sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[1] - pu1_src_left_cpy[(ht_tmp - 1 - row) * 2 + 1]), sign_up, 1)
616 VMOV.8 D14[0],r8 @sign_up = sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[0] - pu1_src_left_cpy[(ht_tmp - 1 - row) * 2]), sign_up, 0)
[all...] |
| /art/runtime/arch/arm64/ |
| registers_arm64.h | 129 D14 = 14,
|
| quick_method_frame_info_arm64.h | 60 (1 << art::arm64::D14) | (1 << art::arm64::D15);
|
| /external/llvm/lib/Target/ARM/ |
| ARMBaseRegisterInfo.h | 67 case D15: case D14: case D13: case D12:
|
| /external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/neon/ |
| armSP_FFT_CToC_SC16_Radix4_ls_unsafe_s.S | 120 #define dTmp2S32 D14.S32
129 #define dYr3 D14.S16
|
| armSP_FFT_CToC_FC32_Radix8_fs_unsafe_s.S | 85 #define dXr7 D14.F32
173 #define dT0 D14.F32
|
| armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_unsafe_s.S | 106 #define qT1 D14.F32
|
| armSP_FFT_CToC_FC32_Radix4_fs_unsafe_s.S | 85 #define dYr3 D14.F32
|
| armSP_FFT_CToC_SC16_Radix4_fs_unsafe_s.S | 93 #define dYr3 D14.S16
|
| armSP_FFT_CToC_SC32_Radix8_fs_unsafe_s.S | 95 #define dXr7 D14.S32
187 #define dT0 D14.S32
|
| armSP_FFT_CToC_FC32_Radix4_ls_unsafe_s.S | 103 #define qT0 d14.f32
110 #define dZr0 D14.F32
|
| armSP_FFT_CToC_FC32_Radix4_unsafe_s.S | 93 #define dYr1 D14.F32
102 #define qT3 d14.f32
|
| armSP_FFT_CToC_SC16_Radix4_unsafe_s.S | 100 #define dYr1 D14.S16
|
| armSP_FFT_CToC_SC32_Radix4_fs_unsafe_s.S | 93 #define dYr3 D14.S32
|
| armSP_FFT_CToC_SC32_Radix4_ls_unsafe_s.S | 118 #define dZr0 D14.S32
|
| /art/compiler/utils/arm/ |
| constants_arm.h | 74 D14 = 14,
|
| /bionic/libm/upstream-freebsd/lib/msun/ld128/ |
| s_expl.c | 363 D14 = 1.1470726176204336e-11, /* 0x1.93971dc395d9ep-37 */
422 dx * (D14 + dx * (D15 + dx * (D16 +
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonRegisterInfo.cpp | 79 Reserved.set(Hexagon::D14);
|
