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    Searched refs:DemandedMask (Results 1 - 7 of 7) sorted by null

  /external/llvm/lib/Transforms/InstCombine/
InstCombineSimplifyDemanded.cpp 57 APInt DemandedMask(APInt::getAllOnesValue(BitWidth));
59 Value *V = SimplifyDemandedUseBits(&Inst, DemandedMask,
70 bool InstCombiner::SimplifyDemandedBits(Use &U, APInt DemandedMask,
73 Value *NewVal = SimplifyDemandedUseBits(U.get(), DemandedMask,
83 /// that only the bits set in DemandedMask of the result of V are ever used
94 /// in DemandedMask. Note also that the bitwidth of V, DemandedMask, KnownZero
102 Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
107 uint32_t BitWidth = DemandedMask.getBitWidth();
116 "Value *V, DemandedMask, KnownZero and KnownOne
    [all...]
InstCombine.h 345 Value *SimplifyDemandedUseBits(Value *V, APInt DemandedMask, APInt &KnownZero,
347 bool SimplifyDemandedBits(Use &U, APInt DemandedMask, APInt &KnownZero,
352 APInt DemandedMask, APInt &KnownZero,
InstCombineVectorOps.cpp 202 APInt DemandedMask(VectorWidth, 0);
203 DemandedMask.setBit(IndexVal);
205 DemandedMask, UndefElts)) {
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  /external/llvm/lib/Target/XCore/
XCoreISelLowering.cpp     [all...]
  /external/llvm/lib/CodeGen/SelectionDAG/
TargetLowering.cpp 366 /// DemandedMask bits of the result of Op are ever used downstream. If we can
371 /// only be accurate for those bits in the DemandedMask.
373 const APInt &DemandedMask,
378 unsigned BitWidth = DemandedMask.getBitWidth();
381 APInt NewMask = DemandedMask;
398 } else if (DemandedMask == 0) {
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  /external/llvm/include/llvm/Target/
TargetLowering.h     [all...]
  /external/llvm/lib/Target/X86/
X86ISelLowering.cpp     [all...]

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