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  /external/llvm/lib/Target/Mips/
MipsAnalyzeImmediate.cpp 79 // Replace a ADDiu & SLL pair with a LUi.
84 // LUi 0x444
100 Seq[0].Opc = LUi;
133 LUi = Mips::LUi;
138 LUi = Mips::LUi64;
MipsAnalyzeImmediate.h 50 /// ReplaceADDiuSLLWithLUi - Replace an ADDiu & SLL pair with a LUi.
58 unsigned ADDiu, ORi, SLL, LUi;
MipsFastISel.cpp 387 EmitInst(Mips::LUi, TmpReg).addImm(Hi);
390 EmitInst(Mips::LUi, ResultReg).addImm(Hi);
MipsMCInstLower.cpp 166 OutMI.setOpcode(Mips::LUi);
MipsSEInstrInfo.cpp 386 unsigned LUi = STI.isABI_N64() ? Mips::LUi64 : Mips::LUi;
398 // The first instruction can be a LUi, which is different from other
403 if (Inst->Opc == LUi)
404 BuildMI(MBB, II, DL, get(LUi), Reg).addImm(SignExtend64<16>(Inst->ImmOpnd));
MipsCodeEmitter.cpp 182 if (Form == MipsII::FrmI && MI.getOpcode() == Mips::LUi)
MipsSEISelDAGToDAG.cpp 149 // lui $v0, %hi(%neg(%gp_rel(fname)))
165 // lui $v0, %hi(__gnu_local_gp)
167 BuildMI(MBB, I, DL, TII.get(Mips::LUi), V0)
178 // lui $v0, %hi(%neg(%gp_rel(fname)))
182 BuildMI(MBB, I, DL, TII.get(Mips::LUi), V0)
195 // 0. lui $2, %hi(_gp_disp)
317 // lui $2, %hi($CPI1_0)
321 // lui $2, %hi($CPI1_0)
701 // The first instruction can be a LUi which is different from other
MipsLongBranch.cpp 280 // lui $at, %hi($tgt - $baltgt)
298 // LUi and ADDiu instructions create 32-bit offset of the target basic
307 // we replace LUi and ADDiu with pseudo instructions
310 // instructions to LUi and ADDiu in the MC layer, we will create
441 BuildMI(MBB, I, DL, TII->get(Mips::LUi), Mips::V0)
  /external/llvm/lib/Target/Mips/MCTargetDesc/
MipsTargetStreamer.cpp 530 // lui $gp, %hi(_gp_disp)
541 // lui $gp, %hi(__gnu_local_gp)
550 TmpInst.setOpcode(Mips::LUi);
610 // lui $gp, %hi(%neg(%gp_rel(funcSym)))
611 Inst.setOpcode(Mips::LUi);
  /external/llvm/lib/Target/Mips/AsmParser/
MipsAsmParser.cpp     [all...]

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