| /external/llvm/lib/Target/Hexagon/ |
| HexagonInstrInfo.h | 124 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
148 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
|
| HexagonInstrInfo.cpp | 957 unsigned NumCycles,
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.h | 176 unsigned NumCycles, unsigned ExtraPredCycles,
188 unsigned NumCycles,
|
| /external/llvm/lib/Target/ARM/ |
| ARMBaseInstrInfo.h | 168 unsigned NumCycles, unsigned ExtraPredCycles,
176 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
178 return NumCycles == 1;
|
| ARMBaseInstrInfo.cpp | [all...] |
| /external/llvm/include/llvm/Target/ |
| TargetInstrInfo.h | 358 /// instructions with accumulated instruction latency of "NumCycles"
363 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
391 isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZInstrInfo.h | 158 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
|
| SystemZInstrInfo.cpp | 516 unsigned NumCycles, unsigned ExtraPredCycles,
519 return NumCycles == 1;
[all...] |
| /external/llvm/lib/CodeGen/ |
| IfConversion.cpp | 687 unsigned NumCycles = SchedModel.computeInstrLatency(&*I, false);
688 if (NumCycles > 1)
689 BBI.ExtraCost += NumCycles-1;
[all...] |
| /external/lzma/CPP/7zip/UI/Common/ |
| Bench.cpp | 875 static bool CrcBig(const void *data, UInt32 size, UInt32 numCycles, UInt32 crcBase)
877 for (UInt32 i = 0; i < numCycles; i++)
889 UInt32 NumCycles;
902 p->Res = CrcBig(p->Data, p->Size, p->NumCycles, p->Crc);
983 UInt32 numCycles = (kCrcBlockSize) / ((bufferSize >> 2) + 1) + 1;
997 info.NumCycles = numCycles;
1018 if (!CrcBig(buf, bufferSize, numCycles, crc))
1025 UInt64 size = (UInt64)numCycles * totalSize;
|
