/external/llvm/lib/Target/ARM/InstPrinter/ |
ARMInstPrinter.h | 39 void printSORegRegOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 40 void printSORegImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 42 void printAddrModeTBB(const MCInst *MI, unsigned OpNum, raw_ostream &O); 43 void printAddrModeTBH(const MCInst *MI, unsigned OpNum, raw_ostream &O); 44 void printAddrMode2Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 45 void printAM2PostIndexOp(const MCInst *MI, unsigned OpNum, raw_ostream &O); 46 void printAM2PreOrOffsetIndexOp(const MCInst *MI, unsigned OpNum, 48 void printAddrMode2OffsetOperand(const MCInst *MI, unsigned OpNum, 51 void printAddrMode3Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 52 void printAddrMode3OffsetOperand(const MCInst *MI, unsigned OpNum, [all...] |
ARMInstPrinter.cpp | 339 void ARMInstPrinter::printThumbLdrLabelOperand(const MCInst *MI, unsigned OpNum, 341 const MCOperand &MO1 = MI->getOperand(OpNum); 372 void ARMInstPrinter::printSORegRegOperand(const MCInst *MI, unsigned OpNum, 374 const MCOperand &MO1 = MI->getOperand(OpNum); 375 const MCOperand &MO2 = MI->getOperand(OpNum+1); 376 const MCOperand &MO3 = MI->getOperand(OpNum+2); 391 void ARMInstPrinter::printSORegImmOperand(const MCInst *MI, unsigned OpNum, 393 const MCOperand &MO1 = MI->getOperand(OpNum); 394 const MCOperand &MO2 = MI->getOperand(OpNum+1); 481 unsigned OpNum, [all...] |
/external/llvm/lib/Target/SystemZ/InstPrinter/ |
SystemZInstPrinter.h | 46 void printOperand(const MCInst *MI, int OpNum, raw_ostream &O); 47 void printBDAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O); 48 void printBDXAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O); 49 void printBDLAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O); 50 void printU4ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O); 51 void printU6ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O); 52 void printS8ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O); 53 void printU8ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O); 54 void printS16ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O); 55 void printU16ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) [all...] |
SystemZInstPrinter.cpp | 54 void SystemZInstPrinter::printU4ImmOperand(const MCInst *MI, int OpNum, 56 int64_t Value = MI->getOperand(OpNum).getImm(); 61 void SystemZInstPrinter::printU6ImmOperand(const MCInst *MI, int OpNum, 63 int64_t Value = MI->getOperand(OpNum).getImm(); 68 void SystemZInstPrinter::printS8ImmOperand(const MCInst *MI, int OpNum, 70 int64_t Value = MI->getOperand(OpNum).getImm(); 75 void SystemZInstPrinter::printU8ImmOperand(const MCInst *MI, int OpNum, 77 int64_t Value = MI->getOperand(OpNum).getImm(); 82 void SystemZInstPrinter::printS16ImmOperand(const MCInst *MI, int OpNum, 84 int64_t Value = MI->getOperand(OpNum).getImm() [all...] |
/external/llvm/lib/Target/AArch64/InstPrinter/ |
AArch64InstPrinter.h | 59 void printAddSubImm(const MCInst *MI, unsigned OpNum, raw_ostream &O); 60 void printLogicalImm32(const MCInst *MI, unsigned OpNum, raw_ostream &O); 61 void printLogicalImm64(const MCInst *MI, unsigned OpNum, raw_ostream &O); 62 void printShifter(const MCInst *MI, unsigned OpNum, raw_ostream &O); 63 void printShiftedRegister(const MCInst *MI, unsigned OpNum, raw_ostream &O); 64 void printExtendedRegister(const MCInst *MI, unsigned OpNum, raw_ostream &O); 65 void printArithExtend(const MCInst *MI, unsigned OpNum, raw_ostream &O); 67 void printMemExtend(const MCInst *MI, unsigned OpNum, raw_ostream &O, 70 void printMemExtend(const MCInst *MI, unsigned OpNum, raw_ostream &O) { 71 printMemExtend(MI, OpNum, O, SrcRegKind, Width) [all...] |
AArch64InstPrinter.cpp | 640 int OpNum = LdStDesc->ListOperand; 641 printVectorList(MI, OpNum++, O, ""); 644 O << '[' << MI->getOperand(OpNum++).getImm() << ']'; 647 unsigned AddrReg = MI->getOperand(OpNum++).getReg(); 652 unsigned Reg = MI->getOperand(OpNum++).getReg(); [all...] |
/external/llvm/lib/Target/SystemZ/MCTargetDesc/ |
SystemZMCCodeEmitter.cpp | 58 uint64_t getBDAddr12Encoding(const MCInst &MI, unsigned OpNum, 61 uint64_t getBDAddr20Encoding(const MCInst &MI, unsigned OpNum, 64 uint64_t getBDXAddr12Encoding(const MCInst &MI, unsigned OpNum, 67 uint64_t getBDXAddr20Encoding(const MCInst &MI, unsigned OpNum, 70 uint64_t getBDLAddr12Len8Encoding(const MCInst &MI, unsigned OpNum, 74 // Operand OpNum of MI needs a PC-relative fixup of kind Kind at 78 uint64_t getPCRelEncoding(const MCInst &MI, unsigned OpNum, 82 uint64_t getPC16DBLEncoding(const MCInst &MI, unsigned OpNum, 85 return getPCRelEncoding(MI, OpNum, Fixups, SystemZ::FK_390_PC16DBL, 2); 87 uint64_t getPC32DBLEncoding(const MCInst &MI, unsigned OpNum, [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430AsmPrinter.cpp | 49 void printOperand(const MachineInstr *MI, int OpNum, 51 void printSrcMemOperand(const MachineInstr *MI, int OpNum, 64 void MSP430AsmPrinter::printOperand(const MachineInstr *MI, int OpNum, 66 const MachineOperand &MO = MI->getOperand(OpNum); 105 void MSP430AsmPrinter::printSrcMemOperand(const MachineInstr *MI, int OpNum, 107 const MachineOperand &Base = MI->getOperand(OpNum); 108 const MachineOperand &Disp = MI->getOperand(OpNum+1); 115 printOperand(MI, OpNum+1, O, "nohash"); 120 printOperand(MI, OpNum, O);
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/external/llvm/lib/Target/NVPTX/InstPrinter/ |
NVPTXInstPrinter.h | 39 void printCvtMode(const MCInst *MI, int OpNum, raw_ostream &O, 41 void printCmpMode(const MCInst *MI, int OpNum, raw_ostream &O, 43 void printLdStCode(const MCInst *MI, int OpNum, 45 void printMemOperand(const MCInst *MI, int OpNum, 47 void printProtoIdent(const MCInst *MI, int OpNum,
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NVPTXInstPrinter.cpp | 96 void NVPTXInstPrinter::printCvtMode(const MCInst *MI, int OpNum, raw_ostream &O, 98 const MCOperand &MO = MI->getOperand(OpNum); 146 void NVPTXInstPrinter::printCmpMode(const MCInst *MI, int OpNum, raw_ostream &O, 148 const MCOperand &MO = MI->getOperand(OpNum); 219 void NVPTXInstPrinter::printLdStCode(const MCInst *MI, int OpNum, 222 const MCOperand &MO = MI->getOperand(OpNum); 267 void NVPTXInstPrinter::printMemOperand(const MCInst *MI, int OpNum, 269 printOperand(MI, OpNum, O); 273 printOperand(MI, OpNum + 1, O); 275 if (MI->getOperand(OpNum + 1).isImm() & [all...] |
/external/llvm/include/llvm/MC/MCParser/ |
MCParsedAsmOperand.h | 37 void setMCOperandNum (unsigned OpNum) { MCOperandNum = OpNum; }
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/external/llvm/lib/Target/ARM/ |
ARMAsmPrinter.h | 59 void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O, 62 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, 65 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
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ARMAsmPrinter.cpp | 126 void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum, 128 const MachineOperand &MO = MI->getOperand(OpNum); 201 bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, 211 return AsmPrinter::PrintAsmOperand(MI, OpNum, AsmVariant, ExtraCode, O); 213 if (MI->getOperand(OpNum).isReg()) { 215 << ARMInstPrinter::getRegisterName(MI->getOperand(OpNum).getReg()) 221 if (!MI->getOperand(OpNum).isImm()) 223 O << MI->getOperand(OpNum).getImm(); 227 printOperand(MI, OpNum, O); 230 if (MI->getOperand(OpNum).isReg()) [all...] |
Thumb2SizeReduction.cpp | 376 unsigned OpNum = 3; // First 'rest' of operands. 414 OpNum = 4; 435 OpNum = 0; 444 OpNum = 2; 452 OpNum = 0; 459 OpNum = 2; 509 for (unsigned e = MI->getNumOperands(); OpNum != e; ++OpNum) 510 MIB.addOperand(MI->getOperand(OpNum)); [all...] |
/external/llvm/lib/Bitcode/Reader/ |
BitcodeReader.cpp | [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64AsmPrinter.cpp | 93 void printOperand(const MachineInstr *MI, unsigned OpNum, raw_ostream &O); 99 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, 102 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum, 209 void AArch64AsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNum, 211 const MachineOperand &MO = MI->getOperand(OpNum); 265 bool AArch64AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, 268 const MachineOperand &MO = MI->getOperand(OpNum); 271 if (!AsmPrinter::PrintAsmOperand(MI, OpNum, AsmVariant, ExtraCode, O)) 291 printOperand(MI, OpNum, O); 321 printOperand(MI, OpNum, O) [all...] |
/external/llvm/include/llvm/MC/ |
MCInstrDesc.h | 156 int getOperandConstraint(unsigned OpNum, 158 if (OpNum < NumOperands && 159 (OpInfo[OpNum].Constraints & (1 << Constraint))) { 161 return (int)(OpInfo[OpNum].Constraints >> Pos) & 0xf;
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/external/llvm/lib/Target/Mips/ |
MipsAsmPrinter.cpp | 438 bool MipsAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, 445 const MachineOperand &MO = MI->getOperand(OpNum); 449 return AsmPrinter::PrintAsmOperand(MI,OpNum,AsmVariant,ExtraCode,O); 485 if (OpNum == 0) 487 const MachineOperand &FlagsOP = MI->getOperand(OpNum - 1); 503 unsigned RegOp = OpNum; 509 RegOp = (Subtarget->isLittle()) ? OpNum + 1 : OpNum; 512 RegOp = (Subtarget->isLittle()) ? OpNum : OpNum + 1 [all...] |
MipsAsmPrinter.h | 124 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum, 127 void printOperand(const MachineInstr *MI, int opNum, raw_ostream &O); 128 void printUnsignedImm(const MachineInstr *MI, int opNum, raw_ostream &O); 129 void printUnsignedImm8(const MachineInstr *MI, int opNum, raw_ostream &O); 130 void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O); 131 void printMemOperandEA(const MachineInstr *MI, int opNum, raw_ostream &O); 132 void printFCCOperand(const MachineInstr *MI, int opNum, raw_ostream &O,
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/external/llvm/utils/PerfectShuffle/ |
PerfectShuffle.cpp | 106 unsigned short OpNum; 110 Operator(unsigned short shufflemask, const char *name, unsigned opnum, 112 : ShuffleMask(shufflemask), OpNum(opnum), Name(name), Cost(cost) { 303 for (unsigned opnum = 0, e = TheOperators.size(); opnum != e; ++opnum) { 304 Operator *Op = TheOperators[opnum]; 394 unsigned OpNum = ShufTab[i].Op ? ShufTab[i].Op->OpNum : 0 [all...] |
/external/llvm/lib/Target/X86/ |
X86InstrInfo.h | 396 getPartialRegUpdateClearance(const MachineInstr *MI, unsigned OpNum, 398 unsigned getUndefRegClearance(const MachineInstr *MI, unsigned &OpNum, 400 void breakPartialRegDependency(MachineBasicBlock::iterator MI, unsigned OpNum, 405 unsigned OpNum,
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/external/llvm/lib/Target/XCore/ |
XCoreAsmPrinter.cpp | 66 void printInlineJT(const MachineInstr *MI, int opNum, raw_ostream &O, 68 void printInlineJT32(const MachineInstr *MI, int opNum, raw_ostream &O) { 69 printInlineJT(MI, opNum, O, ".jmptable32"); 71 void printOperand(const MachineInstr *MI, int opNum, raw_ostream &O); 75 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum, 195 printInlineJT(const MachineInstr *MI, int opNum, raw_ostream &O, 197 unsigned JTI = MI->getOperand(opNum).getIndex(); 211 void XCoreAsmPrinter::printOperand(const MachineInstr *MI, int opNum, 214 const MachineOperand &MO = MI->getOperand(opNum); 256 PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum, [all...] |
/external/llvm/lib/CodeGen/ |
RegAllocFast.cpp | 75 unsigned short LastOpNum; // OpNum on LastUse. 190 LiveRegMap::iterator defineVirtReg(MachineInstr *MI, unsigned OpNum, 192 LiveRegMap::iterator reloadVirtReg(MachineInstr *MI, unsigned OpNum, 195 bool setPhysReg(MachineInstr *MI, unsigned OpNum, unsigned PhysReg); 583 RAFast::defineVirtReg(MachineInstr *MI, unsigned OpNum, 608 LRI->LastOpNum = OpNum; 616 RAFast::reloadVirtReg(MachineInstr *MI, unsigned OpNum, 623 MachineOperand &MO = MI->getOperand(OpNum); 659 LRI->LastOpNum = OpNum; 664 // setPhysReg - Change operand OpNum in MI the refer the PhysReg, considerin [all...] |
/external/llvm/include/llvm/Target/ |
TargetInstrInfo.h | 61 /// class constraint for OpNum, or NULL. 63 unsigned OpNum, [all...] |
/external/llvm/lib/Target/R600/InstPrinter/ |
AMDGPUInstPrinter.h | 42 static void printInterpSlot(const MCInst *MI, unsigned OpNum, raw_ostream &O);
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