HomeSort by relevance Sort by last modified time
    Searched refs:Srl (Results 1 - 5 of 5) sorted by null

  /art/compiler/utils/mips/
assembler_mips.h 79 void Srl(Register rd, Register rs, int shamt);
assembler_mips.cc 234 void MipsAssembler::Srl(Register rd, Register rs, int shamt) {
    [all...]
  /external/llvm/lib/Target/ARM/
ARMISelDAGToDAG.cpp 337 // Look for (add X1, (and (srl X2, c1), c2)) where c2 is constant with
341 // (add X1, (shl (and (srl X2, c1), (c2>>tz)), tz)) where tz is the number
343 // operand of 'add' and the 'and' and 'srl' would become a bits extraction
373 // Look for (and (srl X, c1), c2).
374 SDValue Srl = N1.getOperand(0);
376 if (!isOpcWithIntImmediate(Srl.getNode(), ISD::SRL, Srl_imm) ||
395 Srl = CurDAG->getNode(ISD::SRL, SDLoc(Srl), MVT::i32
    [all...]
  /external/llvm/lib/Target/X86/
X86ISelDAGToDAG.cpp 785 if (Shift.getOpcode() != ISD::SRL ||
799 SDValue Srl = DAG.getNode(ISD::SRL, DL, VT, X, Eight);
800 SDValue And = DAG.getNode(ISD::AND, DL, VT, Srl, NewMask);
810 InsertDAGNode(DAG, N, Srl);
    [all...]
X86ISelLowering.cpp 586 // 64-bit addm sub, shl, sra, srl (iff 32-bit x86)
    [all...]

Completed in 101 milliseconds