| /art/runtime/arch/arm64/ |
| registers_arm64.h | 54 X27 = 27,
|
| quick_method_frame_info_arm64.h | 38 (1 << art::arm64::X26) | (1 << art::arm64::X27) | (1 << art::arm64::X28) |
|
| /art/compiler/jni/quick/arm64/ |
| calling_convention_arm64.cc | 164 callee_save_regs_.push_back(Arm64ManagedRegister::FromCoreRegister(X27));
182 1 << X26 | 1 << X27 | 1 << X28 | 1 << X29 | 1 << LR;
|
| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64AsmBackend.cpp | 424 // X27/X28 pair = 0x00000010
440 else if (Reg1 == AArch64::X27 && Reg2 == AArch64::X28 &&
|
| /external/llvm/lib/Target/PowerPC/Disassembler/ |
| PPCDisassembler.cpp | 167 PPC::X24, PPC::X25, PPC::X26, PPC::X27,
|
| /art/compiler/utils/arm64/ |
| assembler_arm64.cc | 665 StoreToOffset(X27, SP, reg_offset);
736 LoadFromOffset(X27, SP, reg_offset);
|
| managed_register_arm64_test.cc | [all...] |
| /external/llvm/lib/Target/AArch64/Utils/ |
| AArch64BaseInfo.h | 58 case AArch64::X27: return AArch64::W27;
98 case AArch64::W27: return AArch64::X27;
[all...] |
| /external/llvm/lib/Target/PowerPC/AsmParser/ |
| PPCAsmParser.cpp | 64 PPC::X24, PPC::X25, PPC::X26, PPC::X27,
75 PPC::X24, PPC::X25, PPC::X26, PPC::X27,
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCFrameLowering.cpp | 157 {PPC::X27, -40},
[all...] |
| /external/llvm/lib/Target/AArch64/Disassembler/ |
| AArch64Disassembler.cpp | 375 AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP,
[all...] |
