/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/r200/ |
r200_cmdbuf.c | 61 make_empty_list(&rmesa->radeon.hw.atomlist); 62 rmesa->radeon.hw.atomlist.name = "atom-list"; 64 insert_at_tail_if( &rmesa->radeon.hw.atomlist, &rmesa->hw.ctx ); 65 insert_at_tail_if( &rmesa->radeon.hw.atomlist, &rmesa->hw.set ); 66 insert_at_tail_if( &rmesa->radeon.hw.atomlist, &rmesa->hw.lin ); 67 insert_at_tail_if( &rmesa->radeon.hw.atomlist, &rmesa->hw.msk ) [all...] |
r200_state_init.c | 338 if (r200->hw.set.cmd[SET_RE_CNTL] & R200_STIPPLE_ENABLE) 625 rmesa->radeon.hw.max_state_size = 0; 629 rmesa->hw.ATOM.cmd_size = SZ; \ 630 rmesa->hw.ATOM.cmd = (GLuint *)CALLOC(SZ * sizeof(int)); \ 631 rmesa->hw.ATOM.lastcmd = (GLuint *)CALLOC(SZ * sizeof(int)); \ 632 rmesa->hw.ATOM.name = NM; \ 633 rmesa->hw.ATOM.idx = IDX; \ 635 rmesa->hw.ATOM.check = check_##CHK; \ 636 rmesa->radeon.hw.max_state_size += SZ * sizeof(int); \ 638 rmesa->hw.ATOM.check = NULL; [all...] |
r200_state.c | 70 int pp_misc = rmesa->hw.ctx.cmd[CTX_PP_MISC]; 107 rmesa->hw.ctx.cmd[CTX_PP_MISC] = pp_misc; 119 rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCOLOR] = radeonPackColor( 4, color[0], color[1], color[2], color[3] ); 205 GLuint cntl = rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] & 218 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] = cntl | R200_ROP_ENABLE; 219 rmesa->hw.ctx.cmd[CTX_RB3D_ABLENDCNTL] = eqn | func; 220 rmesa->hw.ctx.cmd[CTX_RB3D_CBLENDCNTL] = eqn | func; 223 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] = cntl | R200_ALPHA_BLEND_ENABLE | R200_SEPARATE_ALPHA_ENABLE; 226 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] = cntl; 227 rmesa->hw.ctx.cmd[CTX_RB3D_ABLENDCNTL] = eqn | func [all...] |
r200_ioctl.h | 88 rmesa->hw.ATOM.dirty = GL_TRUE; \ 89 rmesa->radeon.hw.is_dirty = GL_TRUE; \ 96 if (__dword != (rmesa)->hw.ATOM.cmd[__index]) { \ 98 (rmesa)->hw.ATOM.cmd[__index] = __dword; \ 103 memcpy( rmesa->hw.ATOM.lastcmd, rmesa->hw.ATOM.cmd, \ 104 rmesa->hw.ATOM.cmd_size * 4) 114 rmesa->radeon.hw.is_dirty = GL_TRUE;
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/external/mesa3d/src/mesa/drivers/dri/r200/ |
r200_cmdbuf.c | 61 make_empty_list(&rmesa->radeon.hw.atomlist); 62 rmesa->radeon.hw.atomlist.name = "atom-list"; 64 insert_at_tail_if( &rmesa->radeon.hw.atomlist, &rmesa->hw.ctx ); 65 insert_at_tail_if( &rmesa->radeon.hw.atomlist, &rmesa->hw.set ); 66 insert_at_tail_if( &rmesa->radeon.hw.atomlist, &rmesa->hw.lin ); 67 insert_at_tail_if( &rmesa->radeon.hw.atomlist, &rmesa->hw.msk ) [all...] |
r200_state_init.c | 338 if (r200->hw.set.cmd[SET_RE_CNTL] & R200_STIPPLE_ENABLE) 625 rmesa->radeon.hw.max_state_size = 0; 629 rmesa->hw.ATOM.cmd_size = SZ; \ 630 rmesa->hw.ATOM.cmd = (GLuint *)CALLOC(SZ * sizeof(int)); \ 631 rmesa->hw.ATOM.lastcmd = (GLuint *)CALLOC(SZ * sizeof(int)); \ 632 rmesa->hw.ATOM.name = NM; \ 633 rmesa->hw.ATOM.idx = IDX; \ 635 rmesa->hw.ATOM.check = check_##CHK; \ 636 rmesa->radeon.hw.max_state_size += SZ * sizeof(int); \ 638 rmesa->hw.ATOM.check = NULL; [all...] |
r200_state.c | 70 int pp_misc = rmesa->hw.ctx.cmd[CTX_PP_MISC]; 107 rmesa->hw.ctx.cmd[CTX_PP_MISC] = pp_misc; 119 rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCOLOR] = radeonPackColor( 4, color[0], color[1], color[2], color[3] ); 205 GLuint cntl = rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] & 218 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] = cntl | R200_ROP_ENABLE; 219 rmesa->hw.ctx.cmd[CTX_RB3D_ABLENDCNTL] = eqn | func; 220 rmesa->hw.ctx.cmd[CTX_RB3D_CBLENDCNTL] = eqn | func; 223 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] = cntl | R200_ALPHA_BLEND_ENABLE | R200_SEPARATE_ALPHA_ENABLE; 226 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] = cntl; 227 rmesa->hw.ctx.cmd[CTX_RB3D_ABLENDCNTL] = eqn | func [all...] |
r200_ioctl.h | 88 rmesa->hw.ATOM.dirty = GL_TRUE; \ 89 rmesa->radeon.hw.is_dirty = GL_TRUE; \ 96 if (__dword != (rmesa)->hw.ATOM.cmd[__index]) { \ 98 (rmesa)->hw.ATOM.cmd[__index] = __dword; \ 103 memcpy( rmesa->hw.ATOM.lastcmd, rmesa->hw.ATOM.cmd, \ 104 rmesa->hw.ATOM.cmd_size * 4) 114 rmesa->radeon.hw.is_dirty = GL_TRUE;
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/device/asus/flo/power/ |
Android.mk | 20 LOCAL_MODULE_RELATIVE_PATH := hw
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/device/lge/hammerhead/power/ |
Android.mk | 20 LOCAL_MODULE_RELATIVE_PATH := hw
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/device/moto/shamu/power/ |
Android.mk | 20 LOCAL_MODULE_RELATIVE_PATH := hw
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/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/radeon/ |
radeon_ioctl.c | 69 make_empty_list(&rmesa->radeon.hw.atomlist); 70 rmesa->radeon.hw.atomlist.name = "atom-list"; 72 insert_at_tail(&rmesa->radeon.hw.atomlist, &rmesa->hw.ctx); 73 insert_at_tail(&rmesa->radeon.hw.atomlist, &rmesa->hw.set); 74 insert_at_tail(&rmesa->radeon.hw.atomlist, &rmesa->hw.lin); 75 insert_at_tail(&rmesa->radeon.hw.atomlist, &rmesa->hw.msk) [all...] |
radeon_state_init.c | 512 rmesa->radeon.hw.max_state_size = 0; 516 rmesa->hw.ATOM.cmd_size = SZ; \ 517 rmesa->hw.ATOM.cmd = (GLuint *)CALLOC(SZ * sizeof(int)); \ 518 rmesa->hw.ATOM.lastcmd = (GLuint *)CALLOC(SZ * sizeof(int)); \ 519 rmesa->hw.ATOM.name = NM; \ 520 rmesa->hw.ATOM.is_tcl = FLAG; \ 521 rmesa->hw.ATOM.check = check_##CHK; \ 522 rmesa->hw.ATOM.dirty = GL_TRUE; \ 523 rmesa->hw.ATOM.idx = IDX; \ 524 rmesa->radeon.hw.max_state_size += SZ * sizeof(int); [all...] |
radeon_state.c | 69 int pp_misc = rmesa->hw.ctx.cmd[CTX_PP_MISC]; 106 rmesa->hw.ctx.cmd[CTX_PP_MISC] = pp_misc; 113 GLuint b = rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] & ~RADEON_COMB_FCN_MASK; 139 rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = b; 142 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= RADEON_ROP_ENABLE; 144 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~RADEON_ROP_ENABLE; 154 GLuint b = rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] & 252 rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = b; 266 rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] &= ~RADEON_Z_TEST_MASK; 270 rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_Z_TEST_NEVER [all...] |
/external/mesa3d/src/mesa/drivers/dri/radeon/ |
radeon_ioctl.c | 69 make_empty_list(&rmesa->radeon.hw.atomlist); 70 rmesa->radeon.hw.atomlist.name = "atom-list"; 72 insert_at_tail(&rmesa->radeon.hw.atomlist, &rmesa->hw.ctx); 73 insert_at_tail(&rmesa->radeon.hw.atomlist, &rmesa->hw.set); 74 insert_at_tail(&rmesa->radeon.hw.atomlist, &rmesa->hw.lin); 75 insert_at_tail(&rmesa->radeon.hw.atomlist, &rmesa->hw.msk) [all...] |
radeon_state_init.c | 512 rmesa->radeon.hw.max_state_size = 0; 516 rmesa->hw.ATOM.cmd_size = SZ; \ 517 rmesa->hw.ATOM.cmd = (GLuint *)CALLOC(SZ * sizeof(int)); \ 518 rmesa->hw.ATOM.lastcmd = (GLuint *)CALLOC(SZ * sizeof(int)); \ 519 rmesa->hw.ATOM.name = NM; \ 520 rmesa->hw.ATOM.is_tcl = FLAG; \ 521 rmesa->hw.ATOM.check = check_##CHK; \ 522 rmesa->hw.ATOM.dirty = GL_TRUE; \ 523 rmesa->hw.ATOM.idx = IDX; \ 524 rmesa->radeon.hw.max_state_size += SZ * sizeof(int); [all...] |
radeon_state.c | 69 int pp_misc = rmesa->hw.ctx.cmd[CTX_PP_MISC]; 106 rmesa->hw.ctx.cmd[CTX_PP_MISC] = pp_misc; 113 GLuint b = rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] & ~RADEON_COMB_FCN_MASK; 139 rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = b; 142 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= RADEON_ROP_ENABLE; 144 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~RADEON_ROP_ENABLE; 154 GLuint b = rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] & 252 rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = b; 266 rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] &= ~RADEON_Z_TEST_MASK; 270 rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_Z_TEST_NEVER [all...] |
/cts/suite/audio_quality/lib/src/task/ |
TaskOutput.cpp | 48 android::sp<AudioHardware> hw = AudioHardware::createAudioHw(localDevice, true, getTestCase()); local 49 if (hw.get() == NULL) { 50 LOGE("cannot create Audio HW"); 53 if (!hw->prepare(AudioHardware::ESampleRate_44100, mVolume, mMode)) { 64 if (!hw->startPlaybackOrRecord(buffer)) { 73 AudioRemotePlayback* remote = reinterpret_cast<AudioRemotePlayback*>(hw.get()); 79 mHw = hw;
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/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/nouveau/ |
nv04_context.c | 52 struct nouveau_hw_state *hw = &to_nouveau_context(ctx)->hw; local 64 fahrenheit = hw->eng3dm; 66 fahrenheit = hw->eng3d; 80 struct nouveau_hw_state *hw = &to_nouveau_context(ctx)->hw; local 82 struct nv04_fifo *fifo = hw->chan->data; 85 PUSH_DATA (push, hw->surf3d->handle); 87 PUSH_DATA (push, hw->ntfy->handle); 92 PUSH_DATA (push, hw->eng3d->handle) 145 struct nouveau_hw_state *hw; local [all...] |
nv04_surface.c | 204 struct nouveau_hw_state *hw = &to_nouveau_context(ctx)->hw; local 205 struct nouveau_object *swzsurf = hw->swzsurf; 206 struct nv04_fifo *fifo = hw->chan->data; 207 /* Max width & height may not be the same on all HW, but must be POT */ 269 PUSH_DATA (push, hw->surf3d->handle); 285 struct nouveau_hw_state *hw = &to_nouveau_context(ctx)->hw; local 286 struct nv04_fifo *fifo = hw->chan->data; 433 struct nouveau_hw_state *hw = &to_nouveau_context(ctx)->hw local 466 struct nouveau_hw_state *hw = &to_nouveau_context(ctx)->hw; local 482 struct nouveau_hw_state *hw = &to_nouveau_context(ctx)->hw; local [all...] |
/external/mesa3d/src/mesa/drivers/dri/nouveau/ |
nv04_context.c | 52 struct nouveau_hw_state *hw = &to_nouveau_context(ctx)->hw; local 64 fahrenheit = hw->eng3dm; 66 fahrenheit = hw->eng3d; 80 struct nouveau_hw_state *hw = &to_nouveau_context(ctx)->hw; local 82 struct nv04_fifo *fifo = hw->chan->data; 85 PUSH_DATA (push, hw->surf3d->handle); 87 PUSH_DATA (push, hw->ntfy->handle); 92 PUSH_DATA (push, hw->eng3d->handle) 145 struct nouveau_hw_state *hw; local [all...] |
/cts/suite/audio_quality/lib/src/audio/ |
AudioHardware.cpp | 79 android::sp<AudioHardware> hw; local 88 hw = new AudioPlaybackLocal(mHwId); 90 hw = new AudioRecordingLocal(mHwId); 95 hw = new AudioRemotePlayback(testCase->getRemoteAudio()); 97 hw = new AudioRemoteRecording(testCase->getRemoteAudio()); 101 return hw;
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/device/asus/fugu/power/ |
Android.mk | 6 LOCAL_MODULE_PATH := $(TARGET_OUT_SHARED_LIBRARIES)/hw
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/device/moto/shamu/liblight/ |
Android.mk | 10 LOCAL_MODULE_PATH := $(TARGET_OUT_SHARED_LIBRARIES)/hw
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/external/bluetooth/bluedroid/audio_a2dp_hw/ |
Android.mk | 15 LOCAL_MODULE_RELATIVE_PATH := hw
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