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    Searched refs:pm4 (Results 1 - 22 of 22) sorted by null

  /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeonsi/
si_commands.c 31 void si_cmd_surface_sync(struct si_pm4_state *pm4, uint32_t cp_coher_cntl)
33 si_pm4_cmd_begin(pm4, PKT3_SURFACE_SYNC);
34 si_pm4_cmd_add(pm4, cp_coher_cntl); /* CP_COHER_CNTL */
35 si_pm4_cmd_add(pm4, 0xffffffff); /* CP_COHER_SIZE */
36 si_pm4_cmd_add(pm4, 0); /* CP_COHER_BASE */
37 si_pm4_cmd_add(pm4, 0x0000000A); /* POLL_INTERVAL */
38 si_pm4_cmd_end(pm4, false);
si_state_draw.c 43 struct si_pm4_state *pm4; local
51 si_pm4_delete_state(rctx, vs, shader->pm4);
52 pm4 = shader->pm4 = CALLOC_STRUCT(si_pm4_state);
54 si_pm4_inval_shader_cache(pm4);
67 si_pm4_set_reg(pm4, R_0286C4_SPI_VS_OUT_CONFIG,
70 si_pm4_set_reg(pm4, R_02870C_SPI_SHADER_POS_FORMAT,
77 si_pm4_add_bo(pm4, shader->bo, RADEON_USAGE_READ);
78 si_pm4_set_reg(pm4, R_00B120_SPI_SHADER_PGM_LO_VS, va >> 8);
79 si_pm4_set_reg(pm4, R_00B124_SPI_SHADER_PGM_HI_VS, va >> 40)
101 struct si_pm4_state *pm4; local
247 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
319 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
406 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
460 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
557 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
    [all...]
si_state.c 42 struct si_pm4_state *pm4; local
49 pm4 = CALLOC_STRUCT(si_pm4_state);
50 if (pm4 == NULL)
55 si_pm4_set_reg(pm4, R_028238_CB_TARGET_MASK, mask);
57 si_pm4_set_state(rctx, fb_blend, pm4);
138 struct si_pm4_state *pm4 = &blend->pm4; local
151 si_pm4_set_reg(pm4, R_028808_CB_COLOR_CONTROL, color_control);
153 si_pm4_set_reg(pm4, R_028C38_PA_SC_AA_MASK_X0Y0_X1Y0, ~0);
154 si_pm4_set_reg(pm4, R_028C3C_PA_SC_AA_MASK_X0Y1_X1Y1, ~0)
212 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
233 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
256 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
281 struct si_pm4_state *pm4 = &viewport->pm4; local
306 struct si_pm4_state *pm4; local
371 struct si_pm4_state *pm4 = &rs->pm4; local
499 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
562 struct si_pm4_state *pm4 = &dsa->pm4; local
1712 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
2196 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
2244 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
2284 struct si_pm4_state *pm4; local
2429 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
2498 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
    [all...]
si_state.h 33 struct si_pm4_state pm4; member in struct:si_state_blend
39 struct si_pm4_state pm4; member in struct:si_state_viewport
44 struct si_pm4_state pm4; member in struct:si_state_rasterizer
56 struct si_pm4_state pm4; member in struct:si_state_dsa
159 void si_cmd_surface_sync(struct si_pm4_state *pm4, uint32_t cp_coher_cntl);
radeonsi_shader.h 75 struct si_pm4_state *pm4; member in struct:si_pipe_shader
radeonsi_pm4.h 51 uint32_t pm4[SI_PM4_MAX_DW]; member in struct:si_pm4_state
radeonsi_pm4.c 43 state->pm4[state->ndw++] = dw;
50 state->pm4[state->last_pm4] = PKT3(state->last_opcode,
213 memcpy(&cs->buf[cs->cdw], state->pm4, state->ndw * 4);
r600_hw_context.c 158 struct si_pm4_state *pm4; local
163 pm4 = CALLOC_STRUCT(si_pm4_state);
164 si_cmd_surface_sync(pm4, S_0085F0_CB0_DEST_BASE_ENA(1) |
174 si_pm4_emit(ctx, pm4);
175 si_pm4_free_state(ctx, pm4, ~0);
  /external/mesa3d/src/gallium/drivers/radeonsi/
si_commands.c 31 void si_cmd_surface_sync(struct si_pm4_state *pm4, uint32_t cp_coher_cntl)
33 si_pm4_cmd_begin(pm4, PKT3_SURFACE_SYNC);
34 si_pm4_cmd_add(pm4, cp_coher_cntl); /* CP_COHER_CNTL */
35 si_pm4_cmd_add(pm4, 0xffffffff); /* CP_COHER_SIZE */
36 si_pm4_cmd_add(pm4, 0); /* CP_COHER_BASE */
37 si_pm4_cmd_add(pm4, 0x0000000A); /* POLL_INTERVAL */
38 si_pm4_cmd_end(pm4, false);
si_state_draw.c 43 struct si_pm4_state *pm4; local
51 si_pm4_delete_state(rctx, vs, shader->pm4);
52 pm4 = shader->pm4 = CALLOC_STRUCT(si_pm4_state);
54 si_pm4_inval_shader_cache(pm4);
67 si_pm4_set_reg(pm4, R_0286C4_SPI_VS_OUT_CONFIG,
70 si_pm4_set_reg(pm4, R_02870C_SPI_SHADER_POS_FORMAT,
77 si_pm4_add_bo(pm4, shader->bo, RADEON_USAGE_READ);
78 si_pm4_set_reg(pm4, R_00B120_SPI_SHADER_PGM_LO_VS, va >> 8);
79 si_pm4_set_reg(pm4, R_00B124_SPI_SHADER_PGM_HI_VS, va >> 40)
101 struct si_pm4_state *pm4; local
247 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
319 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
406 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
460 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
557 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
    [all...]
si_state.c 42 struct si_pm4_state *pm4; local
49 pm4 = CALLOC_STRUCT(si_pm4_state);
50 if (pm4 == NULL)
55 si_pm4_set_reg(pm4, R_028238_CB_TARGET_MASK, mask);
57 si_pm4_set_state(rctx, fb_blend, pm4);
138 struct si_pm4_state *pm4 = &blend->pm4; local
151 si_pm4_set_reg(pm4, R_028808_CB_COLOR_CONTROL, color_control);
153 si_pm4_set_reg(pm4, R_028C38_PA_SC_AA_MASK_X0Y0_X1Y0, ~0);
154 si_pm4_set_reg(pm4, R_028C3C_PA_SC_AA_MASK_X0Y1_X1Y1, ~0)
212 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
233 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
256 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
281 struct si_pm4_state *pm4 = &viewport->pm4; local
306 struct si_pm4_state *pm4; local
371 struct si_pm4_state *pm4 = &rs->pm4; local
499 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
562 struct si_pm4_state *pm4 = &dsa->pm4; local
1712 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
2196 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
2244 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
2284 struct si_pm4_state *pm4; local
2429 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
2498 struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); local
    [all...]
si_state.h 33 struct si_pm4_state pm4; member in struct:si_state_blend
39 struct si_pm4_state pm4; member in struct:si_state_viewport
44 struct si_pm4_state pm4; member in struct:si_state_rasterizer
56 struct si_pm4_state pm4; member in struct:si_state_dsa
159 void si_cmd_surface_sync(struct si_pm4_state *pm4, uint32_t cp_coher_cntl);
radeonsi_shader.h 75 struct si_pm4_state *pm4; member in struct:si_pipe_shader
radeonsi_pm4.h 51 uint32_t pm4[SI_PM4_MAX_DW]; member in struct:si_pm4_state
radeonsi_pm4.c 43 state->pm4[state->ndw++] = dw;
50 state->pm4[state->last_pm4] = PKT3(state->last_opcode,
213 memcpy(&cs->buf[cs->cdw], state->pm4, state->ndw * 4);
r600_hw_context.c 158 struct si_pm4_state *pm4; local
163 pm4 = CALLOC_STRUCT(si_pm4_state);
164 si_cmd_surface_sync(pm4, S_0085F0_CB0_DEST_BASE_ENA(1) |
174 si_pm4_emit(ctx, pm4);
175 si_pm4_free_state(ctx, pm4, ~0);
  /external/clang/test/CXX/temp/temp.arg/temp.arg.nontype/
p1-11.cpp 43 PM<(int X::*)0> pm4; variable
  /external/chromium_org/third_party/mesa/src/src/gallium/drivers/r600/
r600_hw_context.c 142 block->pm4[block->pm4_ndwords++] = PKT3(opcode, n, 0);
143 block->pm4[block->pm4_ndwords++] = (block->start_offset - offset_base) >> 2;
144 block->reg = &block->pm4[block->pm4_ndwords];
170 block->pm4[block->pm4_ndwords++] = PKT3(PKT3_NOP, 0, 0);
171 block->pm4[block->pm4_ndwords++] = 0x00000000;
176 block->pm4[block->pm4_ndwords++] = PKT3(PKT3_SURFACE_BASE_UPDATE, 0, 0);
177 block->pm4[block->pm4_ndwords++] = reg[i+j].sbu_flags;
829 block->pm4[reloc->bo_pm4_index] =
832 block->pm4[reloc->bo_pm4_index] = 0;
848 memcpy(&cs->buf[cs->cdw], block->pm4, cp_dwords * 4)
    [all...]
r600.h 140 uint32_t pm4[R600_BLOCK_MAX_REG]; member in struct:r600_block
  /external/mesa3d/src/gallium/drivers/r600/
r600_hw_context.c 142 block->pm4[block->pm4_ndwords++] = PKT3(opcode, n, 0);
143 block->pm4[block->pm4_ndwords++] = (block->start_offset - offset_base) >> 2;
144 block->reg = &block->pm4[block->pm4_ndwords];
170 block->pm4[block->pm4_ndwords++] = PKT3(PKT3_NOP, 0, 0);
171 block->pm4[block->pm4_ndwords++] = 0x00000000;
176 block->pm4[block->pm4_ndwords++] = PKT3(PKT3_SURFACE_BASE_UPDATE, 0, 0);
177 block->pm4[block->pm4_ndwords++] = reg[i+j].sbu_flags;
829 block->pm4[reloc->bo_pm4_index] =
832 block->pm4[reloc->bo_pm4_index] = 0;
848 memcpy(&cs->buf[cs->cdw], block->pm4, cp_dwords * 4)
    [all...]
r600.h 140 uint32_t pm4[R600_BLOCK_MAX_REG]; member in struct:r600_block
  /external/eclipse-basebuilder/basebuilder-3.6.2/org.eclipse.releng.basebuilder/plugins/
org.eclipse.test.performance_3.6.0.v20091014.jar 

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