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  /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/r200/
r200_fragshader.c 48 GLuint reg0 = 0; local
76 reg0 |= (((index - GL_REG_0_ATI)*2) + 10 + useOddSrc) << (5*argPos);
79 reg0 |= (R200_TXC_ARG_A_TFACTOR_COLOR + useOddSrc) << (5*argPos);
84 reg0 |= (R200_TXC_ARG_A_TFACTOR1_COLOR + useOddSrc) << (5*argPos);
89 reg0 |= (R200_TXC_ARG_A_DIFFUSE_COLOR + useOddSrc) << (5*argPos);
92 reg0 |= (R200_TXC_ARG_A_SPECULAR_COLOR + useOddSrc) << (5*argPos);
96 reg0 |= R200_TXC_COMP_ARG_A << (4*argPos);
100 reg0 ^= R200_TXC_COMP_ARG_A << (4*argPos);
102 reg0 |= R200_TXC_BIAS_ARG_A << (4*argPos);
104 reg0 |= R200_TXC_SCALE_ARG_A << (4*argPos)
    [all...]
  /external/mesa3d/src/mesa/drivers/dri/r200/
r200_fragshader.c 48 GLuint reg0 = 0; local
76 reg0 |= (((index - GL_REG_0_ATI)*2) + 10 + useOddSrc) << (5*argPos);
79 reg0 |= (R200_TXC_ARG_A_TFACTOR_COLOR + useOddSrc) << (5*argPos);
84 reg0 |= (R200_TXC_ARG_A_TFACTOR1_COLOR + useOddSrc) << (5*argPos);
89 reg0 |= (R200_TXC_ARG_A_DIFFUSE_COLOR + useOddSrc) << (5*argPos);
92 reg0 |= (R200_TXC_ARG_A_SPECULAR_COLOR + useOddSrc) << (5*argPos);
96 reg0 |= R200_TXC_COMP_ARG_A << (4*argPos);
100 reg0 ^= R200_TXC_COMP_ARG_A << (4*argPos);
102 reg0 |= R200_TXC_BIAS_ARG_A << (4*argPos);
104 reg0 |= R200_TXC_SCALE_ARG_A << (4*argPos)
    [all...]
  /external/chromium_org/v8/test/cctest/
test-utils-arm64.cc 146 bool Equal64(const Register& reg0,
149 DCHECK(reg0.Is64Bits() && reg1.Is64Bits());
150 int64_t expected = core->xreg(reg0.code());
test-utils-arm64.h 189 bool Equal64(const Register& reg0, const RegisterDump* core,
  /art/compiler/utils/x86_64/
assembler_x86_64.h 382 void cmpl(CpuRegister reg0, CpuRegister reg1);
387 void cmpq(CpuRegister reg0, CpuRegister reg1);
388 void cmpq(CpuRegister reg0, const Immediate& imm);
389 void cmpq(CpuRegister reg0, const Address& address);
assembler_x86_64.cc 848 void X86_64Assembler::cmpl(CpuRegister reg0, CpuRegister reg1) {
850 EmitOptionalRex32(reg0, reg1);
852 EmitOperand(reg0.LowBits(), Operand(reg1));
864 void X86_64Assembler::cmpq(CpuRegister reg0, CpuRegister reg1) {
866 EmitRex64(reg0, reg1);
868 EmitOperand(reg0.LowBits(), Operand(reg1));
    [all...]
  /external/chromium_org/third_party/skia/gm/
bitmaprect.cpp 248 static skiagm::GMRegistry reg0(MyFactory0);
  /external/chromium_org/v8/src/x87/
assembler-x87.h 672 void cmp(Register reg0, Register reg1) { cmp(reg0, Operand(reg1)); }
754 void test(Register reg0, Register reg1) { test(reg0, Operand(reg1)); }
    [all...]
  /external/chromium_org/v8/src/mips/
macro-assembler-mips.cc 487 void MacroAssembler::GetNumberHash(Register reg0, Register scratch) {
493 xor_(reg0, reg0, scratch);
499 nor(scratch, reg0, zero_reg);
500 sll(at, reg0, 15);
501 addu(reg0, scratch, at);
504 srl(at, reg0, 12);
505 xor_(reg0, reg0, at);
508 sll(at, reg0, 2)
    [all...]
macro-assembler-mips.h 439 void GetNumberHash(Register reg0, Register scratch);
445 Register reg0,
    [all...]
  /external/chromium_org/v8/src/mips64/
macro-assembler-mips64.cc 491 void MacroAssembler::GetNumberHash(Register reg0, Register scratch) {
497 xor_(reg0, reg0, scratch);
504 nor(scratch, reg0, zero_reg);
505 sll(at, reg0, 15);
506 addu(reg0, scratch, at);
509 srl(at, reg0, 12);
510 xor_(reg0, reg0, at);
513 sll(at, reg0, 2)
    [all...]
macro-assembler-mips64.h 460 void GetNumberHash(Register reg0, Register scratch);
466 Register reg0,
    [all...]
  /external/fio/
configure 1176 register unsigned long reg0 asm("0") = 0;
1182 : "=QS" (stfle_bits), "+d" (reg0)
  /external/chromium_org/v8/src/ia32/
assembler-ia32.h 689 void cmp(Register reg0, Register reg1) { cmp(reg0, Operand(reg1)); }
771 void test(Register reg0, Register reg1) { test(reg0, Operand(reg1)); }
    [all...]
  /art/compiler/utils/x86/
assembler_x86.h 341 void cmpl(Register reg0, Register reg1);
assembler_x86.cc 761 void X86Assembler::cmpl(Register reg0, Register reg1) {
764 EmitOperand(reg0, Operand(reg1));
    [all...]

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