| /external/llvm/test/MC/MachO/ |
| bad-macro.s | 5 .macro test_macro reg1, reg2
|
| /external/linux-tools-perf/perf-3.12.0/arch/arm/lib/ |
| memcpy.S | 23 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
24 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4}
27 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
28 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
39 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
40 stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
47 .macro enter reg1 reg2
48 stmdb sp!, {r0, \reg1, \reg2}
51 .macro exit reg1 reg2
52 ldmfd sp!, {r0, \reg1, \reg2
[all...] |
| /external/chromium_org/third_party/webrtc/system_wrappers/interface/ |
| asm_defines.h | 52 .macro streqh reg1, reg2, num
53 strheq \reg1, \reg2, \num variable
|
| /external/chromium_org/third_party/boringssl/src/crypto/perlasm/ |
| x86nasm.pl | 36 { my($size,$addr,$reg1,$reg2,$idx)=@_;
39 if (!defined($idx) && 1*$reg2) { $idx=$reg2; $reg2=$reg1; undef $reg1; }
62 $ret .= "+$reg1" if ($reg1 ne "");
65 { $ret .= "$reg1"; }
|
| x86gas.pl | 70 { my($addr,$reg1,$reg2,$idx)=@_;
73 if (!defined($idx) && 1*$reg2) { $idx=$reg2; $reg2=$reg1; undef $reg1; }
79 $reg1 = "%$reg1" if ($reg1);
86 $ret .= "($reg1,$reg2,$idx)";
88 elsif ($reg1)
89 { $ret .= "($reg1)"; }
|
| x86masm.pl | 39 { my($size,$addr,$reg1,$reg2,$idx)=@_;
42 if (!defined($idx) && 1*$reg2) { $idx=$reg2; $reg2=$reg1; undef $reg1; }
61 $ret .= "+$reg1" if ($reg1 ne "");
64 { $ret .= "$reg1"; }
|
| /external/libunwind/src/ptrace/ |
| _UPT_access_mem.c | 63 long reg1, reg2;
64 reg1 = ptrace (PTRACE_PEEKDATA, pid, (void*) (uintptr_t) addr, 0);
70 *val = ((unw_word_t)(reg2) << 32) | (uint32_t) reg1;
|
| /external/openssl/crypto/perlasm/ |
| x86gas.pl | 70 { my($addr,$reg1,$reg2,$idx)=@_;
77 $reg1 = "%$reg1" if ($reg1);
84 $ret .= "($reg1,$reg2,$idx)";
86 elsif ($reg1)
87 { $ret .= "($reg1)"; }
|
| x86nasm.pl | 36 { my($size,$addr,$reg1,$reg2,$idx)=@_;
60 $ret .= "+$reg1" if ($reg1 ne "");
63 { $ret .= "$reg1"; }
|
| x86masm.pl | 39 { my($size,$addr,$reg1,$reg2,$idx)=@_;
59 $ret .= "+$reg1" if ($reg1 ne "");
62 { $ret .= "$reg1"; }
|
| /external/chromium_org/third_party/mesa/src/src/mesa/program/ |
| register_allocate.c | 189 struct ra_reg *reg1 = ®s->regs[r1]; local
191 if (reg1->conflict_list_size == reg1->num_conflicts) {
192 reg1->conflict_list_size *= 2;
193 reg1->conflict_list = reralloc(regs->regs, reg1->conflict_list,
194 unsigned int, reg1->conflict_list_size);
196 reg1->conflict_list[reg1->num_conflicts++] = r2;
197 reg1->conflicts[r2] = GL_TRUE
[all...] |
| /external/mesa3d/src/mesa/program/ |
| register_allocate.c | 189 struct ra_reg *reg1 = ®s->regs[r1]; local
191 if (reg1->conflict_list_size == reg1->num_conflicts) {
192 reg1->conflict_list_size *= 2;
193 reg1->conflict_list = reralloc(regs->regs, reg1->conflict_list,
194 unsigned int, reg1->conflict_list_size);
196 reg1->conflict_list[reg1->num_conflicts++] = r2;
197 reg1->conflicts[r2] = GL_TRUE
[all...] |
| /art/compiler/dex/quick/arm64/ |
| int_arm64.cc | 597 RegLocation Arm64Mir2Lir::GenDivRemLit(RegLocation rl_dest, RegStorage reg1, int lit, bool is_div) {
605 rl_result = GenDivRem(rl_result, reg1, lit_temp, is_div);
1421 int reg1 = -1, reg2 = -1; local
1437 int reg1 = -1, reg2 = -1; local
1487 int reg1 = -1, reg2 = -1; local
1605 int reg1 = -1, reg2 = -1; local
1621 int reg1 = -1, reg2 = -1; local
[all...] |
| /art/compiler/dex/ |
| reg_storage.h | 279 static constexpr bool SameRegType(RegStorage reg1, RegStorage reg2) {
280 return ((reg1.reg_ & kShapeTypeMask) == (reg2.reg_ & kShapeTypeMask));
283 static constexpr bool SameRegType(int reg1, int reg2) {
284 return ((reg1 & kShapeTypeMask) == (reg2 & kShapeTypeMask));
|
| /external/chromium_org/third_party/skia/gm/ |
| imageblur.cpp | 70 static GMRegistry reg1(MyFactory1);
|
| imageblurtiled.cpp | 77 static GMRegistry reg1(MyFactory1);
|
| /external/aac/libFDK/src/ |
| fixpoint_math.cpp | 430 FIXP_DBL reg1, reg2, regtmp ; local
445 reg1 = invSqrtTab[ (INT)(val>>(DFRACT_BITS-1-(SQRT_BITS+1))) & SQRT_BITS_MASK ];
448 regtmp= fPow2Div2(reg1); /* a = Q^2 */
450 reg1 += (fMultDiv2(regtmp, reg1)<<4); /* Q = Q + Q*b */
455 reg1 = fMultDiv2(reg1, reg2) << 2;
460 return(reg1);
|
| /external/linux-tools-perf/perf-3.12.0/arch/xtensa/lib/ |
| memset.S | 33 #define EX(insn,reg1,reg2,offset,handler) \
34 9: insn reg1, reg2, offset; \
|
| /external/chromium_org/v8/test/cctest/ |
| test-utils-arm64.cc | 148 const Register& reg1) {
149 DCHECK(reg0.Is64Bits() && reg1.Is64Bits());
151 int64_t result = core->xreg(reg1.code());
|
| test-utils-arm64.h | 190 const Register& reg1);
|
| /art/compiler/utils/ |
| assembler_test.h | 83 for (auto reg1 : registers) {
85 (assembler_.get()->*f)(*reg1, *reg2);
88 size_t reg1_index = base.find("{reg1}");
91 sreg << *reg1; local
|
| /external/chromium_org/v8/src/arm64/ |
| assembler-arm64.h | 410 Register GetAllocatableRegisterThatIsNotOneOf(Register reg1,
418 bool AreAliased(const CPURegister& reg1,
430 // arguments. At least one argument (reg1) must be valid (not NoCPUReg).
431 bool AreSameSizeAndType(const CPURegister& reg1,
448 explicit CPURegList(CPURegister reg1,
452 : list_(reg1.Bit() | reg2.Bit() | reg3.Bit() | reg4.Bit()),
453 size_(reg1.SizeInBits()), type_(reg1.type()) {
454 DCHECK(AreSameSizeAndType(reg1, reg2, reg3, reg4));
[all...] |
| /external/chromium_org/third_party/libvpx/source/libvpx/vp9/common/arm/neon/ |
| vp9_idct32x32_add_neon.asm | 72 ; reg1 = output[first_offset]
78 LOAD_FROM_OUTPUT $prev_offset, $first_offset, $second_offset, $reg1, $reg2
81 vld1.s16 {$reg1}, [r1]
84 ; (used) two registers ($reg1, $reg2)
88 ; output[first_offset] = reg1
94 STORE_IN_OUTPUT $prev_offset, $first_offset, $second_offset, $reg1, $reg2
97 vst1.16 {$reg1}, [r1]
241 DO_BUTTERFLY $regC, $regD, $regA, $regB, $first_constant, $second_constant, $reg1, $reg2, $reg3, $reg4
276 vqrshrn.s32 $reg1, q8, #14
286 DO_BUTTERFLY_STD $first_constant, $second_constant, $reg1, $reg2, $reg3, $reg
[all...] |
| /external/libvpx/libvpx/vp9/common/arm/neon/ |
| vp9_idct32x32_add_neon.asm | 72 ; reg1 = output[first_offset]
78 LOAD_FROM_OUTPUT $prev_offset, $first_offset, $second_offset, $reg1, $reg2
81 vld1.s16 {$reg1}, [r1]
84 ; (used) two registers ($reg1, $reg2)
88 ; output[first_offset] = reg1
94 STORE_IN_OUTPUT $prev_offset, $first_offset, $second_offset, $reg1, $reg2
97 vst1.16 {$reg1}, [r1]
241 DO_BUTTERFLY $regC, $regD, $regA, $regB, $first_constant, $second_constant, $reg1, $reg2, $reg3, $reg4
276 vqrshrn.s32 $reg1, q8, #14
286 DO_BUTTERFLY_STD $first_constant, $second_constant, $reg1, $reg2, $reg3, $reg
[all...] |
| /external/chromium_org/v8/src/mips/ |
| macro-assembler-mips.cc | 532 Register reg1,
552 // reg1 - Used to hold the capacity mask of the dictionary.
558 GetNumberHash(reg0, reg1);
561 lw(reg1, FieldMemOperand(elements, SeededNumberDictionary::kCapacityOffset));
562 sra(reg1, reg1, kSmiTagSize);
563 Subu(reg1, reg1, Operand(1));
573 and_(reg2, reg2, reg1);
597 lw(reg1, FieldMemOperand(reg2, kDetailsOffset))
[all...] |
