| /external/ltrace/sysdeps/linux-gnu/ |
| mksyscallent | 29 FS="[ \t\n()+]+";
|
| mksyscallent_mips | 28 FS="[ \t\n()+]+";
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDGPUSubtarget.h | 43 AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS);
47 virtual void ParseSubtargetFeatures(llvm::StringRef CPU, llvm::StringRef FS);
|
| AMDGPUSubtarget.cpp | 23 AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS) :
24 AMDGPUGenSubtargetInfo(TT, CPU, FS), mDumpCode(false) {
35 ParseSubtargetFeatures(GPU, FS);
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDGPUSubtarget.cpp | 23 AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS) :
24 AMDGPUGenSubtargetInfo(TT, CPU, FS), mDumpCode(false) {
35 ParseSubtargetFeatures(GPU, FS);
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64Subtarget.h | 66 AArch64Subtarget &initializeSubtargetDependencies(StringRef FS);
72 const std::string &FS, TargetMachine &TM, bool LittleEndian);
112 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
|
| AArch64TargetMachine.h | 30 StringRef FS, const TargetOptions &Options,
69 StringRef FS, const TargetOptions &Options,
80 StringRef FS, const TargetOptions &Options,
|
| /external/llvm/lib/Target/ARM/ |
| ARMSubtarget.cpp | 145 StringRef FS) {
147 resetSubtargetFeatures(CPU, FS);
152 const std::string &FS, TargetMachine &TM,
154 : ARMGenSubtargetInfo(TT, CPU, FS), ARMProcFamily(Others),
157 DL(computeDataLayout(initializeSubtargetDependencies(CPU, FS))),
228 std::string FS =
230 if (!FS.empty()) {
232 resetSubtargetFeatures(CPU, FS);
236 void ARMSubtarget::resetSubtargetFeatures(StringRef CPU, StringRef FS) {
250 if (!FS.empty())
[all...] |
| ARMTargetMachine.h | 29 StringRef CPU, StringRef FS,
73 ARMTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS,
84 StringRef CPU, StringRef FS, const TargetOptions &Options,
94 ARMBETargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS,
106 ThumbTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS,
117 StringRef FS, const TargetOptions &Options,
128 StringRef FS, const TargetOptions &Options,
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonSubtarget.h | 56 HexagonSubtarget(StringRef TT, StringRef CPU, StringRef FS,
74 StringRef FS);
78 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
|
| /external/llvm/lib/Target/Sparc/ |
| SparcSubtarget.h | 50 const std::string &FS, TargetMachine &TM, bool is64bit);
72 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
73 SparcSubtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS);
|
| SparcTargetMachine.h | 27 StringRef CPU, StringRef FS, const TargetOptions &Options,
63 StringRef CPU, StringRef FS,
75 StringRef CPU, StringRef FS,
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZSubtarget.h | 53 StringRef FS);
56 const std::string &FS, const TargetMachine &TM);
71 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
|
| SystemZTargetMachine.cpp | 23 StringRef CPU, StringRef FS,
27 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
28 Subtarget(TT, CPU, FS, *this) {
|
| /external/llvm/lib/Target/XCore/ |
| XCoreTargetMachine.cpp | 24 StringRef CPU, StringRef FS,
28 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
29 Subtarget(TT, CPU, FS, *this) {
|
| /external/llvm/lib/Target/Mips/ |
| MipsTargetMachine.cpp | 54 StringRef CPU, StringRef FS,
58 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
59 Subtarget(TT, CPU, FS, isLittle, RM, this) {
67 StringRef CPU, StringRef FS, const TargetOptions &Options,
70 : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {}
76 StringRef CPU, StringRef FS, const TargetOptions &Options,
79 : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {}
|
| MipsTargetMachine.h | 31 MipsTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS,
78 StringRef CPU, StringRef FS, const TargetOptions &Options,
89 StringRef CPU, StringRef FS, const TargetOptions &Options,
|
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXTargetMachine.cpp | 70 StringRef CPU, StringRef FS,
74 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
75 Subtarget(TT, CPU, FS, *this, is64bit) {
82 const Target &T, StringRef TT, StringRef CPU, StringRef FS,
85 : NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {}
90 const Target &T, StringRef TT, StringRef CPU, StringRef FS,
93 : NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {}
|
| NVPTXSubtarget.h | 58 const std::string &FS, const TargetMachine &TM, bool is64Bit);
105 NVPTXSubtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS);
106 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCTargetMachine.cpp | 41 StringRef FS, const TargetOptions &Options,
44 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
45 Subtarget(TT, CPU, FS, *this, is64Bit, OL) {
52 StringRef CPU, StringRef FS,
56 : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {
62 StringRef CPU, StringRef FS,
66 : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {
|
| PPCSubtarget.cpp | 71 StringRef FS) {
73 resetSubtargetFeatures(CPU, FS);
78 const std::string &FS, PPCTargetMachine &TM,
80 : PPCGenSubtargetInfo(TT, CPU, FS), IsPPC64(is64Bit), TargetTriple(TT),
82 FrameLowering(initializeSubtargetDependencies(CPU, FS)),
106 std::string FS =
108 if (!FS.empty()) {
110 resetSubtargetFeatures(CPU, FS);
145 void PPCSubtarget::resetSubtargetFeatures(StringRef CPU, StringRef FS) {
160 std::string FullFS = FS;
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86Subtarget.cpp | 193 std::string FS =
195 if (!FS.empty()) {
197 resetSubtargetFeatures(CPU, FS);
201 void X86Subtarget::resetSubtargetFeatures(StringRef CPU, StringRef FS) {
208 std::string FullFS = FS;
339 StringRef FS) {
341 resetSubtargetFeatures(CPU, FS);
346 const std::string &FS, X86TargetMachine &TM,
348 : X86GenSubtargetInfo(TT, CPU, FS), X86ProcFamily(Others),
357 InstrInfo(initializeSubtargetDependencies(CPU, FS)), TLInfo(TM)
[all...] |
| /external/chromium_org/third_party/webrtc/modules/audio_coding/codecs/isac/main/source/ |
| bandwidth_estimator.c | 177 bwest_str->last_reduction_ts = arr_ts + 3*FS;
211 1000.0f / FS > 3000)
218 bwest_str->last_update_ts) * 1000.0f /(float) FS) /
226 bwest_str->last_reduction_ts)*1000.0f/FS) );
253 bwest_str->last_reduction_ts = arr_ts + 3*FS;
261 bwest_str->last_reduction_ts = arr_ts + 3*FS;
302 float latencyMs = bwest_str->consecLatency/(FS/1000);
306 bwest_str->inWaitLatePkts = (int16_t)((bwest_str->consecLatency/(FS/1000)) / 30);// + 150;
361 if (arr_ts_diff > frame_length * FS/1000 + 400.0f)
364 arr_ts_diff = frame_length * FS/1000 + 400.0f
[all...] |
| /external/chromium_org/third_party/webrtc/modules/audio_coding/codecs/isac/main/test/QA/ |
| runiSACfault.txt | 58 $ISAC -I -B "${TARGETRATE[idx]}" -F $testnr -FS "${SAMPFREQ[idx]}" "$file" \
66 $ISAC -I -B "${TARGETRATE[idx]}" -F 10 -FS "${SAMPFREQ[idx]}" "$file" \
70 $ISAC -I -B "${TARGETRATE[idx]}" -F 10 -PL 10 -FS "${SAMPFREQ[idx]}" "$file" \
|
| /external/llvm/include/llvm/MC/ |
| MCSubtargetInfo.h | 44 uint64_t FeatureBits; // Feature bits for current CPU + FS
47 void InitMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS,
70 void InitMCProcessorInfo(StringRef CPU, StringRef FS);
81 uint64_t ToggleFeature(StringRef FS);
|
