/external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/neon/ |
armSP_FFT_CToC_SC32_Radix4_unsafe_s.S | 102 #define dYr1 D14.S32
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armSP_FFT_CToC_SC16_Radix8_fs_unsafe_s.S | 82 #define dXr0 D14.S16
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/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
AArch64AsmBackend.cpp | 450 // D14/D15 pair = 0x00000800 460 else if (Reg1 == AArch64::D14 && Reg2 == AArch64::D15)
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/external/libhevc/common/arm/ |
ihevc_sao_edge_offset_class2.s | 289 VMOV.8 D14[0],r4 @I sign_up = sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[0] - pu1_src_left_cpy[ht_tmp - 1 - row]), sign_up, 0) 371 VMOV.8 D14[0],r4 @II sign_up = sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[0] - pu1_src_left_cpy[ht_tmp - 1 - row]), sign_up, 0) 389 VMOV.8 D14[0],r2 @III sign_up = sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[0] - pu1_src_left_cpy[ht_tmp - 1 - row]), sign_up, 0) 466 VMOV.8 D14[0],r4 @sign_up = sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[0] - pu1_src_left_cpy[ht_tmp - 1 - row]), sign_up, 0) 603 VMOV.8 d14[0],r8 @sign_up = sign_up = vsetq_lane_s8(SIGN(pu1_src_cpy[0] - pu1_src_left_cpy[ht_tmp - 1 - row]), sign_up, 0) [all...] |
/external/llvm/lib/Target/Sparc/Disassembler/ |
SparcDisassembler.cpp | 101 SP::D14, SP::D30, SP::D15, SP::D31 };
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/external/llvm/lib/Target/AArch64/Utils/ |
AArch64BaseInfo.h | 125 case AArch64::D14: return AArch64::B14; 165 case AArch64::B14: return AArch64::D14; [all...] |
/art/compiler/utils/arm/ |
managed_register_arm_test.cc | 162 reg = ArmManagedRegister::FromDRegister(D14); 169 EXPECT_EQ(D14, reg.AsDRegister()); [all...] |
/external/llvm/lib/Target/Sparc/AsmParser/ |
SparcAsmParser.cpp | 115 Sparc::D12, Sparc::D13, Sparc::D14, Sparc::D15,
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/art/compiler/utils/arm64/ |
managed_register_arm64_test.cc | [all...] |
/external/llvm/lib/Target/AArch64/Disassembler/ |
AArch64Disassembler.cpp | 288 AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, [all...] |
/external/llvm/lib/Target/ARM/Disassembler/ |
ARMDisassembler.cpp | [all...] |
/external/llvm/lib/Target/ARM/AsmParser/ |
ARMAsmParser.cpp | [all...] |