Lines Matching defs:rl_src
232 RegLocation rl_src = mir_graph_->GetSrc(mir, 0);
235 RegisterClass src_reg_class = rl_src.ref ? kRefReg : kCoreReg;
237 rl_src = LoadValue(rl_src, src_reg_class);
251 OpRegRegImm(kOpSub, rl_result.reg, rl_src.reg, -true_val);
257 OpRegRegImm(kOpRsub, rl_result.reg, rl_src.reg, 1);
263 OpRegImm(kOpCmp, rl_src.reg, 0);
274 OpRegImm(kOpCmp, rl_src.reg, 0);
287 OpRegImm(kOpCmp, rl_src.reg, 0);
493 RegLocation rl_src, RegLocation rl_dest, int lit) {
504 rl_src = LoadValue(rl_src, kCoreReg);
509 // rl_dest and rl_src might overlap.
513 NewLIR4(kThumb2Smull, r_lo.GetReg(), r_hi.GetReg(), r_magic.GetReg(), rl_src.reg.GetReg());
516 OpRegRegRegShift(kOpSub, r_div_result, r_hi, rl_src.reg, EncodeShift(kArmAsr, 31));
519 OpRegRegImm(kOpAsr, r_lo, rl_src.reg, 31);
524 OpRegReg(kOpAdd, r_hi, rl_src.reg);
525 OpRegRegImm(kOpAsr, r_lo, rl_src.reg, 31);
544 OpRegRegReg(kOpSub, rl_result.reg, rl_src.reg, tmp1);
669 bool ArmMir2Lir::EasyMultiply(RegLocation rl_src, RegLocation rl_dest, int lit) {
676 rl_src = LoadValue(rl_src, kCoreReg);
679 GenEasyMultiplyTwoOps(rl_result.reg, rl_src.reg, ops);
963 RegLocation rl_src = info->args[0];
980 LoadValueDirectFixed(rl_src, rs_src);
1067 void ArmMir2Lir::GenMultiplyByTwoBitMultiplier(RegLocation rl_src,
1070 OpRegRegRegShift(kOpAdd, rl_result.reg, rl_src.reg, rl_src.reg,
1145 void ArmMir2Lir::GenNegLong(RegLocation rl_dest, RegLocation rl_src) {
1146 rl_src = LoadValueWide(rl_src, kCoreReg);
1151 if (rl_result.reg.GetLowReg() == rl_src.reg.GetHighReg()) {
1154 OpRegRegReg(kOpSub, rl_result.reg.GetLow(), z_reg, rl_src.reg.GetLow());
1158 OpRegRegReg(kOpSub, rl_result.reg.GetLow(), z_reg, rl_src.reg.GetLow());
1159 OpRegRegReg(kOpSbc, rl_result.reg.GetHigh(), z_reg, rl_src.reg.GetHigh());
1382 RegLocation rl_index, RegLocation rl_src, int scale, bool card_mark) {
1431 if (rl_src.wide || rl_src.fp || constant_index) {
1432 if (rl_src.wide) {
1433 rl_src = LoadValueWide(rl_src, reg_class);
1435 rl_src = LoadValue(rl_src, reg_class);
1449 StoreBaseDisp(reg_ptr, data_offset, rl_src.reg, size, kNotVolatile);
1454 rl_src = LoadValue(rl_src, reg_class);
1459 StoreBaseIndexed(reg_ptr, rl_index.reg, rl_src.reg, scale, size);
1466 MarkGCCard(rl_src.reg, rl_array.reg);
1472 RegLocation rl_dest, RegLocation rl_src, RegLocation rl_shift) {
1473 rl_src = LoadValueWide(rl_src, kCoreReg);
1477 StoreValueWide(rl_dest, rl_src);
1480 if (BadOverlap(rl_src, rl_dest)) {
1481 GenShiftOpLong(opcode, rl_dest, rl_src, rl_shift);
1489 OpRegRegReg(kOpAdd, rl_result.reg.GetLow(), rl_src.reg.GetLow(), rl_src.reg.GetLow());
1490 OpRegRegReg(kOpAdc, rl_result.reg.GetHigh(), rl_src.reg.GetHigh(), rl_src.reg.GetHigh());
1492 OpRegCopy(rl_result.reg.GetHigh(), rl_src.reg);
1495 OpRegRegImm(kOpLsl, rl_result.reg.GetHigh(), rl_src.reg.GetLow(), shift_amount - 32);
1498 OpRegRegImm(kOpLsl, rl_result.reg.GetHigh(), rl_src.reg.GetHigh(), shift_amount);
1499 OpRegRegRegShift(kOpOr, rl_result.reg.GetHigh(), rl_result.reg.GetHigh(), rl_src.reg.GetLow(),
1501 OpRegRegImm(kOpLsl, rl_result.reg.GetLow(), rl_src.reg.GetLow(), shift_amount);
1507 OpRegCopy(rl_result.reg.GetLow(), rl_src.reg.GetHigh());
1508 OpRegRegImm(kOpAsr, rl_result.reg.GetHigh(), rl_src.reg.GetHigh(), 31);
1510 OpRegRegImm(kOpAsr, rl_result.reg.GetLow(), rl_src.reg.GetHigh(), shift_amount - 32);
1511 OpRegRegImm(kOpAsr, rl_result.reg.GetHigh(), rl_src.reg.GetHigh(), 31);
1514 OpRegRegImm(kOpLsr, t_reg, rl_src.reg.GetLow(), shift_amount);
1515 OpRegRegRegShift(kOpOr, rl_result.reg.GetLow(), t_reg, rl_src.reg.GetHigh(),
1518 OpRegRegImm(kOpAsr, rl_result.reg.GetHigh(), rl_src.reg.GetHigh(), shift_amount);
1524 OpRegCopy(rl_result.reg.GetLow(), rl_src.reg.GetHigh());
1527 OpRegRegImm(kOpLsr, rl_result.reg.GetLow(), rl_src.reg.GetHigh(), shift_amount - 32);
1531 OpRegRegImm(kOpLsr, t_reg, rl_src.reg.GetLow(), shift_amount);
1532 OpRegRegRegShift(kOpOr, rl_result.reg.GetLow(), t_reg, rl_src.reg.GetHigh(),
1535 OpRegRegImm(kOpLsr, rl_result.reg.GetHigh(), rl_src.reg.GetHigh(), shift_amount);
