Lines Matching refs:lir
96 LIR* X86Mir2Lir::OpCmpBranch(ConditionCode cond, RegStorage src1, RegStorage src2, LIR* target) {
99 LIR* branch = NewLIR2(kX86Jcc8, 0 /* lir operand for Jcc offset */ ,
105 LIR* X86Mir2Lir::OpCmpImmBranch(ConditionCode cond, RegStorage reg,
106 int check_value, LIR* target) {
118 LIR* branch = NewLIR2(kX86Jcc8, 0 /* lir operand for Jcc offset */ , cc);
123 LIR* X86Mir2Lir::OpRegCopyNoInsert(RegStorage r_dest, RegStorage r_src) {
133 LIR* res = RawLIR(current_dalvik_offset_, r_dest.Is64Bit() ? kX86Mov64RR : kX86Mov32RR,
143 LIR *res = OpRegCopyNoInsert(r_dest, r_src);
258 LIR* cmp_branch = OpCmpBranch(code, left_op, right_op, nullptr);
260 LIR* that_is_it = NewLIR1(kX86Jmp8, 0);
261 LIR* true_case = NewLIR0(kPseudoTargetLabel);
264 LIR* end = NewLIR0(kPseudoTargetLabel);
385 LIR* taken = &block_label_list_[bb->taken];
451 LIR* taken = &block_label_list_[bb->taken];
620 LIR *minint_branch = NewLIR2(kX86Jcc8, 0, kX86CondEq);
775 LIR *minus_one_branch = NewLIR2(kX86Jcc8, 0, kX86CondNe);
779 LIR * minint_branch = NewLIR2(kX86Jcc8, 0, kX86CondNe);
786 LIR* done = NewLIR1(kX86Jmp8, 0);
1073 LIR* X86Mir2Lir::OpPcRelLoad(RegStorage reg, LIR* target) {
1090 LIR *res = RawLIR(current_dalvik_offset_, kX86Mov32RM, reg.GetReg(), reg.GetReg(), 256,
1098 LIR* X86Mir2Lir::OpVldm(RegStorage r_base, int count) {
1103 LIR* X86Mir2Lir::OpVstm(RegStorage r_base, int count) {
1145 ArrayBoundsCheckSlowPath(Mir2Lir* m2l, LIR* branch,
1183 LIR* branch = OpCondBranch(kCondUge, nullptr);
1193 ArrayBoundsCheckSlowPath(Mir2Lir* m2l, LIR* branch,
1220 LIR* branch = OpCondBranch(kCondLs, nullptr);
1226 LIR* X86Mir2Lir::OpTestSuspend(LIR* target) {
1236 LIR* X86Mir2Lir::OpDecAndBranch(ConditionCode c_code, RegStorage reg, LIR* target) {
1252 LIR* X86Mir2Lir::OpIT(ConditionCode cond, const char* guide) {
1257 void X86Mir2Lir::OpEndIT(LIR* it) {
1279 LIR *m;
1430 LIR *m = NewLIR2(kX86Mul32DaM, rs_rX86_SP.GetReg(), displacement + LOWORD_OFFSET);
1512 LIR *m = NewLIR3(kX86Imul32RM, rs_r1.GetReg(), rs_rX86_SP.GetReg(),
1534 LIR *m = NewLIR3(kX86Imul32RM, rs_r0.GetReg(), rs_rX86_SP.GetReg(),
1545 LIR *m = NewLIR3(kX86Imul32RM, rs_r1.GetReg(), rs_rX86_SP.GetReg(),
1568 LIR *m = NewLIR2(kX86Mul32DaM, rs_rX86_SP.GetReg(), displacement + LOWORD_OFFSET);
1615 LIR *lir = NewLIR3(x86op, cu_->target64 ? rl_dest.reg.GetReg() : rl_dest.reg.GetLowReg(),
1617 AnnotateDalvikRegAccess(lir, (displacement + LOWORD_OFFSET) >> 2,
1621 lir = NewLIR3(x86op, rl_dest.reg.GetHighReg(), r_base, displacement + HIWORD_OFFSET);
1622 AnnotateDalvikRegAccess(lir, (displacement + HIWORD_OFFSET) >> 2,
1650 LIR *lir = NewLIR3(x86op, r_base, displacement + LOWORD_OFFSET,
1652 AnnotateDalvikRegAccess(lir, (displacement + LOWORD_OFFSET) >> 2,
1654 AnnotateDalvikRegAccess(lir, (displacement + LOWORD_OFFSET) >> 2,
1658 lir = NewLIR3(x86op, r_base, displacement + HIWORD_OFFSET, rl_src.reg.GetHighReg());
1659 AnnotateDalvikRegAccess(lir, (displacement + HIWORD_OFFSET) >> 2,
1661 AnnotateDalvikRegAccess(lir, (displacement + HIWORD_OFFSET) >> 2,
1800 LIR *minint_branch = NewLIR2(kX86Jcc8, 0, kX86CondEq);
1978 LIR *minus_one_branch = NewLIR2(kX86Jcc8, 0, kX86CondNe);
1983 LIR *minint_branch = NewLIR2(kX86Jcc8, 0, kX86CondNe);
1990 LIR* done = NewLIR1(kX86Jmp8, 0);
2488 LIR *lir = NewLIR3(x86op, r_base, displacement + LOWORD_OFFSET, val);
2489 AnnotateDalvikRegAccess(lir, (displacement + LOWORD_OFFSET) >> 2,
2491 AnnotateDalvikRegAccess(lir, (displacement + LOWORD_OFFSET) >> 2,
2520 LIR *lir = NewLIR3(x86op, r_base, displacement + LOWORD_OFFSET, val_lo);
2521 AnnotateDalvikRegAccess(lir, (displacement + LOWORD_OFFSET) >> 2,
2523 AnnotateDalvikRegAccess(lir, (displacement + LOWORD_OFFSET) >> 2,
2528 LIR *lir = NewLIR3(x86op, r_base, displacement + HIWORD_OFFSET, val_hi);
2529 AnnotateDalvikRegAccess(lir, (displacement + HIWORD_OFFSET) >> 2,
2531 AnnotateDalvikRegAccess(lir, (displacement + HIWORD_OFFSET) >> 2,
2639 LIR* null_branchover = OpCmpImmBranch(kCondEq, object.reg, 0, NULL);
2682 LIR* target = NewLIR0(kPseudoTargetLabel);
2959 LIR *m = NewLIR3(kX86MovsxdRM, rl_result.reg.GetReg(), rs_rX86_SP.GetReg(),
