Lines Matching refs:sd
279 void Arm32Assembler::vmovs(SRegister sd, SRegister sm, Condition cond) {
280 EmitVFPsss(cond, B23 | B21 | B20 | B6, sd, S0, sm);
289 bool Arm32Assembler::vmovs(SRegister sd, float s_imm, Condition cond) {
297 sd, S0, S0);
319 void Arm32Assembler::vadds(SRegister sd, SRegister sn, SRegister sm,
321 EmitVFPsss(cond, B21 | B20, sd, sn, sm);
331 void Arm32Assembler::vsubs(SRegister sd, SRegister sn, SRegister sm,
333 EmitVFPsss(cond, B21 | B20 | B6, sd, sn, sm);
343 void Arm32Assembler::vmuls(SRegister sd, SRegister sn, SRegister sm,
345 EmitVFPsss(cond, B21, sd, sn, sm);
355 void Arm32Assembler::vmlas(SRegister sd, SRegister sn, SRegister sm,
357 EmitVFPsss(cond, 0, sd, sn, sm);
367 void Arm32Assembler::vmlss(SRegister sd, SRegister sn, SRegister sm,
369 EmitVFPsss(cond, B6, sd, sn, sm);
379 void Arm32Assembler::vdivs(SRegister sd, SRegister sn, SRegister sm,
381 EmitVFPsss(cond, B23, sd, sn, sm);
391 void Arm32Assembler::vabss(SRegister sd, SRegister sm, Condition cond) {
392 EmitVFPsss(cond, B23 | B21 | B20 | B7 | B6, sd, S0, sm);
401 void Arm32Assembler::vnegs(SRegister sd, SRegister sm, Condition cond) {
402 EmitVFPsss(cond, B23 | B21 | B20 | B16 | B6, sd, S0, sm);
411 void Arm32Assembler::vsqrts(SRegister sd, SRegister sm, Condition cond) {
412 EmitVFPsss(cond, B23 | B21 | B20 | B16 | B7 | B6, sd, S0, sm);
420 void Arm32Assembler::vcvtsd(SRegister sd, DRegister dm, Condition cond) {
421 EmitVFPsd(cond, B23 | B21 | B20 | B18 | B17 | B16 | B8 | B7 | B6, sd, dm);
430 void Arm32Assembler::vcvtis(SRegister sd, SRegister sm, Condition cond) {
431 EmitVFPsss(cond, B23 | B21 | B20 | B19 | B18 | B16 | B7 | B6, sd, S0, sm);
435 void Arm32Assembler::vcvtid(SRegister sd, DRegister dm, Condition cond) {
436 EmitVFPsd(cond, B23 | B21 | B20 | B19 | B18 | B16 | B8 | B7 | B6, sd, dm);
440 void Arm32Assembler::vcvtsi(SRegister sd, SRegister sm, Condition cond) {
441 EmitVFPsss(cond, B23 | B21 | B20 | B19 | B7 | B6, sd, S0, sm);
450 void Arm32Assembler::vcvtus(SRegister sd, SRegister sm, Condition cond) {
451 EmitVFPsss(cond, B23 | B21 | B20 | B19 | B18 | B7 | B6, sd, S0, sm);
455 void Arm32Assembler::vcvtud(SRegister sd, DRegister dm, Condition cond) {
456 EmitVFPsd(cond, B23 | B21 | B20 | B19 | B18 | B8 | B7 | B6, sd, dm);
460 void Arm32Assembler::vcvtsu(SRegister sd, SRegister sm, Condition cond) {
461 EmitVFPsss(cond, B23 | B21 | B20 | B19 | B6, sd, S0, sm);
470 void Arm32Assembler::vcmps(SRegister sd, SRegister sm, Condition cond) {
471 EmitVFPsss(cond, B23 | B21 | B20 | B18 | B6, sd, S0, sm);
480 void Arm32Assembler::vcmpsz(SRegister sd, Condition cond) {
481 EmitVFPsss(cond, B23 | B21 | B20 | B18 | B16 | B6, sd, S0, S0);
876 void Arm32Assembler::vldrs(SRegister sd, const Address& ad, Condition cond) {
878 CHECK_NE(sd, kNoSRegister);
882 ((static_cast<int32_t>(sd) & 1)*B22) |
883 ((static_cast<int32_t>(sd) >> 1)*B12) |
889 void Arm32Assembler::vstrs(SRegister sd, const Address& ad, Condition cond) {
892 CHECK_NE(sd, kNoSRegister);
896 ((static_cast<int32_t>(sd) & 1)*B22) |
897 ((static_cast<int32_t>(sd) >> 1)*B12) |
977 SRegister sd, SRegister sn, SRegister sm) {
978 CHECK_NE(sd, kNoSRegister);
984 ((static_cast<int32_t>(sd) & 1)*B22) |
986 ((static_cast<int32_t>(sd) >> 1)*B12) |
1013 SRegister sd, DRegister dm) {
1014 CHECK_NE(sd, kNoSRegister);
1019 sd) & 1)*B22) |
1020 ((static_cast<int32_t>(sd) >> 1)*B12) |
