Lines Matching refs:EmitOptionalRex32
41 EmitOptionalRex32(reg);
49 EmitOptionalRex32(address);
64 EmitOptionalRex32(reg);
71 EmitOptionalRex32(address);
92 EmitOptionalRex32(reg);
99 EmitOptionalRex32(address);
123 EmitOptionalRex32(dst);
140 EmitOptionalRex32(dst, src);
156 EmitOptionalRex32(dst, src);
172 EmitOptionalRex32(src, dst);
179 EmitOptionalRex32(dst);
245 EmitOptionalRex32(dst, src);
254 EmitOptionalRex32(dst, src);
263 EmitOptionalRex32(dst, src);
272 EmitOptionalRex32(dst, src);
287 EmitOptionalRex32(src, dst);
304 EmitOptionalRex32(dst, src);
314 EmitOptionalRex32(src, dst);
324 EmitOptionalRex32(dst, src);
334 EmitOptionalRex32(dst, src);
344 EmitOptionalRex32(src, dst);
354 EmitOptionalRex32(dst, src);
364 EmitOptionalRex32(dst, src);
374 EmitOptionalRex32(dst, src);
384 EmitOptionalRex32(dst, src);
394 EmitOptionalRex32(dst, src);
404 EmitOptionalRex32(dst, src);
414 EmitOptionalRex32(dst, src);
424 EmitOptionalRex32(dst, src);
448 EmitOptionalRex32(dst, src);
458 EmitOptionalRex32(src, dst);
468 EmitOptionalRex32(dst, src);
478 EmitOptionalRex32(dst, src);
488 EmitOptionalRex32(dst, src);
498 EmitOptionalRex32(dst, src);
508 EmitOptionalRex32(dst, src);
518 EmitOptionalRex32(dst, src);
528 EmitOptionalRex32(dst, src);
538 EmitOptionalRex32(dst, src);
548 EmitOptionalRex32(dst, src);
558 EmitOptionalRex32(dst, src);
568 EmitOptionalRex32(dst, src);
578 EmitOptionalRex32(dst, src);
588 EmitOptionalRex32(dst, src);
598 EmitOptionalRex32(dst, src);
608 EmitOptionalRex32(dst, src);
618 EmitOptionalRex32(dst, src);
628 EmitOptionalRex32(dst, src);
638 EmitOptionalRex32(dst, src);
647 EmitOptionalRex32(a, b);
657 EmitOptionalRex32(a, b);
667 EmitOptionalRex32(dst, src);
677 EmitOptionalRex32(dst, src);
687 EmitOptionalRex32(dst, src);
697 EmitOptionalRex32(dst, src);
706 EmitOptionalRex32(dst, src);
715 EmitOptionalRex32(dst, src);
725 EmitOptionalRex32(dst, src);
819 EmitOptionalRex32(dst, src);
835 EmitOptionalRex32(reg, address);
843 EmitOptionalRex32(reg);
850 EmitOptionalRex32(reg0, reg1);
858 EmitOptionalRex32(reg, address);
890 EmitOptionalRex32(dst, src);
898 EmitOptionalRex32(reg, address);
906 EmitOptionalRex32(reg, address);
914 EmitOptionalRex32(address);
921 EmitOptionalRex32(reg1, reg2);
945 EmitOptionalRex32(reg);
963 EmitOptionalRex32(dst, src);
971 EmitOptionalRex32(dst);
986 EmitOptionalRex32(dst, src);
994 EmitOptionalRex32(dst);
1001 EmitOptionalRex32(dst, src);
1077 EmitOptionalRex32(reg);
1109 EmitOptionalRex32(reg, address);
1117 EmitOptionalRex32(address);
1124 EmitOptionalRex32(dst, src);
1132 EmitOptionalRex32(reg);
1163 EmitOptionalRex32(reg, address);
1177 EmitOptionalRex32(reg);
1185 EmitOptionalRex32(dst, src);
1194 EmitOptionalRex32(reg);
1203 EmitOptionalRex32(reg, address);
1212 EmitOptionalRex32(reg);
1220 EmitOptionalRex32(address);
1228 EmitOptionalRex32(reg);
1236 EmitOptionalRex32(address);
1280 EmitOptionalRex32(reg);
1288 EmitOptionalRex32(reg);
1369 EmitOptionalRex32(reg);
1376 EmitOptionalRex32(address);
1638 void X86_64Assembler::EmitOptionalRex32(CpuRegister reg) {
1642 void X86_64Assembler::EmitOptionalRex32(CpuRegister dst, CpuRegister src) {
1646 void X86_64Assembler::EmitOptionalRex32(XmmRegister dst, XmmRegister src) {
1650 void X86_64Assembler::EmitOptionalRex32(CpuRegister dst, XmmRegister src) {
1654 void X86_64Assembler::EmitOptionalRex32(XmmRegister dst, CpuRegister src) {
1658 void X86_64Assembler::EmitOptionalRex32(const Operand& operand) {
1665 void X86_64Assembler::EmitOptionalRex32(CpuRegister dst, const Operand& operand) {
1675 void X86_64Assembler::EmitOptionalRex32(XmmRegister dst, const Operand& operand) {
