Lines Matching defs:Rm
148 struct Rm {
149 explicit Rm(uint32_t instruction) : shift((instruction >> 4) & 0xff), rm(instruction & 0xf) {}
151 ArmRegister rm;
153 std::ostream& operator<<(std::ostream& os, const Rm& r) {
154 os << r.rm;
274 // Show only Rd and Rm.
640 // |111|0101| op3|S| Rn |imm3| Rd |i2|ty| Rm |
649 ArmRegister Rm(instr, 0);
733 args << Rm;
1282 // {ST,LD}RB Rt,[Rn,Rm,lsl #imm2] - 111 11 00 0 0 00 0 nnnn tttt 0 00000 ii mmmm
1294 ArmRegister Rm(instr, 0);
1295 args << Rt << ", [" << Rn << ", " << Rm;
1306 // STRH Rt,[Rn,Rm,lsl #imm2] - 111 11 00 0 0 01 0 nnnn tttt 0 00000 ii mmmm
1318 ArmRegister Rm(instr, 0);
1319 args << Rt << ", [" << Rn << ", " << Rm;
1360 // STR Rt, [Rn, Rm, LSL #imm2] - 111 11 000 010 0 nnnn tttt 000000iimmmm
1363 ArmRegister Rm(instr, 0);
1366 args << Rt << ", [" << Rn << ", " << Rm;
1436 // |111|11|0101001| Rm |1111| Rd |11|op3| Rm |
1444 ArmRegister Rm(instr, 0);
1446 args << Rd << ", " << Rm;
1448 if (Rm.r != Rm2.r || Rm.r == 13 || Rm.r == 15 || Rd.r == 13 || Rd.r == 15) {
1483 // LDR.W Rt, [Rn, Rm{, LSL #imm2}] - 111 11 00 00 101 nnnn tttt 000000iimmmm
1485 ArmRegister rm(instr, 0);
1487 args << Rt << ", [" << Rn << ", " << rm;
1532 ArmRegister Rm(instr, 0);
1534 args << Rd << ", " << Rn << ", " << Rm;
1542 ArmRegister Rm(instr, 0);
1549 args << Rd << ", " << Rn << ", " << Rm;
1552 args << Rd << ", " << Rn << ", " << Rm << ", " << Ra;
1556 args << Rd << ", " << Rn << ", " << Rm << ", " << Ra;
1572 ArmRegister Rm(instr, 0);
1579 args << RdLo << ", " << RdHi << ", " << Rn << ", " << Rm;
1583 args << Rd << ", " << Rn << ", " << Rm;
1587 args << RdLo << ", " << RdHi << ", " << Rn << ", " << Rm;
1591 args << Rd << ", " << Rn << ", " << Rm;
1638 ThumbRegister rm(instr, 3);
1647 args << Rd << ", " << rm << ", #" << imm5;
1669 ArmRegister Rm(imm3_or_Rm);
1670 args << ", " << Rm;
1701 ThumbRegister rm(instr, 3);
1704 args << rdn << ", " << rm;
1713 ArmRegister rm(instr, 3);
1717 args << DN_Rdn << ", " << rm;
1724 ArmRegister rm(instr, 3);
1728 args << DN_Rdn << ", " << rm;
1734 ArmRegister rm(instr, 3);
1738 args << N_Rn << ", " << rm;
1744 ArmRegister rm(instr, 3);
1746 args << rm;
1764 ThumbRegister Rm(instr, 6);
1777 args << Rt << ", [" << Rn << ", " << Rm << "]";
1853 ThumbRegister Rm(instr, 3);
1855 args << Rd << ", " << Rm;