Lines Matching refs:rtex
1447 struct r600_resource_texture *rtex;
1461 rtex = (struct r600_resource_texture*)state->cbufs[cb]->texture;
1462 blocksize = util_format_get_blocksize(rtex->real_format);
1464 if (rtex->depth)
1467 if (rtex->depth && !rtex->is_flushing_texture) {
1469 rtex = rtex->flushed_depth_texture;
1472 offset = rtex->surface.level[level].offset;
1473 if (rtex->surface.level[level].mode < RADEON_SURF_MODE_1D) {
1474 offset += rtex->surface.level[level].slice_size *
1477 pitch = (rtex->surface.level[level].nblk_x) / 8 - 1;
1478 slice = (rtex->surface.level[level].nblk_x * rtex->surface.level[level].nblk_y) / 64;
1484 switch (rtex->surface.level[level].mode) {
1492 if (rtex->resource.b.b.bind & PIPE_BIND_SCANOUT) {
1551 if (rtex->resource.b.b.usage == PIPE_USAGE_STAGING) {
1585 si_pm4_add_bo(pm4, &rtex->resource, RADEON_USAGE_READWRITE);
1590 if (rtex->surface.level[level].mode < RADEON_SURF_MODE_1D) {
1615 struct r600_resource_texture *rtex;
1629 rtex = (struct r600_resource_texture*)surf->base.texture;
1631 format = si_translate_dbformat(rtex->real_format);
1634 z_offs += rtex->surface.level[level].offset;
1637 s_offs += rtex->surface.stencil_offset;
1638 z_offs += rtex->surface.level[level].offset / 4;
1643 pitch = (rtex->surface.level[level].nblk_x / 8) - 1;
1644 slice = (rtex->surface.level[level].nblk_x * rtex->surface.level[level].nblk_y) / 64;
1652 if (rtex->surface.level[level].mode == RADEON_SURF_MODE_1D) {
1656 } else if (rtex
1674 rtex->surface.level[level].mode);
1692 if (rtex->surface.flags & RADEON_SURF_SBUFFER) {
1698 si_pm4_add_bo(pm4, &rtex->resource, RADEON_USAGE_READWRITE);
