Lines Matching refs:x3r
71 #define x3r s6
73 #define t3r s8 /*@// Temporarily hold x3r and x3i*/
137 vldm.f32 pSrc, {x3r, x3i} @// x6
155 vadd.f32 x1r,x1r,x3r @// u4
158 vadd.f32 sr, x3r, x3r
160 vsub.f32 x3r,x1r,sr @// u5
164 M_VSTM x3r,x3i, pU5
173 vldm pSrc, {x3r, x3i} @// x7
188 vadd.f32 x1r,x1r,x3r @// u6
191 vadd.f32 sr, x3r, x3r
193 vsub.f32 x3r,x1r,sr @// u7
198 M_VSTM x3r,x3i, pU7
203 M_VLDM x3r,x3i, pU4
213 vadd.f32 x2r,x2r,x3r @// v0
216 vadd.f32 sr, x3r, x3r
218 vsub.f32 x3r,x2r,sr @// v2
234 vadd.f32 x3r,x3r,x1i @// y6
239 vsub.f32 t1r,x3r,si @// t1r=x2r reg;t1i=x2i reg
247 vstm pDst, {x3r, x3i} @// store y6
250 vstm pDst, {x3r, x3i} @// store y2
263 M_VLDM x3r,x3i,pU7
275 vadd.f32 x1i,x1i,x3r
277 vadd.f32 sr, x3r, x3r
285 vadd.f32 x3r,t3i,t3r @// v7
292 vmul.f32 x3r, x3r, roothalf @// (v7.i + v7.r)*(1/sqrt(2))
297 vadd.f32 x2r,x2r,x3r @// y7
300 vadd.f32 sr, x3r, x3r
302 vsub.f32 x3r,x2r,sr @// y3
317 vstm pDst, {x3r, x3i} @// store y3
328 vstm pDst, {x3r, x3i} @// store y5
