Lines Matching refs:Assembler
41 #include "src/arm/assembler-arm-inl.h"
44 #include "src/macro-assembler.h"
235 return Assembler::is_constant_pool_load(pc_);
248 CpuFeatures::FlushICache(pc_, instruction_count * Assembler::kInstrSize);
262 // See assembler-arm-inl.h for inlined constructors
461 Assembler::Assembler(Isolate* isolate, void* buffer, int buffer_size)
480 Assembler::~Assembler() {
485 void Assembler::GetCode(CodeDesc* desc) {
501 void Assembler::Align(int m) {
509 void Assembler::CodeTargetAlign() {
515 Condition Assembler::GetCondition(Instr instr) {
520 bool Assembler::IsBranch(Instr instr) {
525 int Assembler::GetBranchOffset(Instr instr) {
533 bool Assembler::IsLdrRegisterImmediate(Instr instr) {
538 bool Assembler::IsVldrDRegisterImmediate(Instr instr) {
543 int Assembler::GetLdrRegisterImmediateOffset(Instr instr) {
551 int Assembler::GetVldrDRegisterImmediateOffset(Instr instr) {
560 Instr Assembler::SetLdrRegisterImmediateOffset(Instr instr, int offset) {
572 Instr Assembler::SetVldrDRegisterImmediateOffset(Instr instr, int offset) {
585 bool Assembler::IsStrRegisterImmediate(Instr instr) {
590 Instr Assembler::SetStrRegisterImmediateOffset(Instr instr, int offset) {
602 bool Assembler::IsAddRegisterImmediate(Instr instr) {
607 Instr Assembler::SetAddRegisterImmediateOffset(Instr instr, int offset) {
616 Register Assembler::GetRd(Instr instr) {
623 Register Assembler::GetRn(Instr instr) {
630 Register Assembler::GetRm(Instr instr) {
637 Instr Assembler::GetConsantPoolLoadPattern() {
646 Instr Assembler::GetConsantPoolLoadMask() {
655 bool Assembler::IsPush(Instr instr) {
660 bool Assembler::IsPop(Instr instr) {
665 bool Assembler::IsStrRegFpOffset(Instr instr) {
670 bool Assembler::IsLdrRegFpOffset(Instr instr) {
675 bool Assembler::IsStrRegFpNegOffset(Instr instr) {
680 bool Assembler::IsLdrRegFpNegOffset(Instr instr) {
685 bool Assembler::IsLdrPcImmediateOffset(Instr instr) {
692 bool Assembler::IsLdrPpImmediateOffset(Instr instr) {
699 bool Assembler::IsLdrPpRegOffset(Instr instr) {
706 Instr Assembler::GetLdrPpRegOffsetPattern() { return kLdrPpRegPattern; }
709 bool Assembler::IsVldrDPcImmediateOffset(Instr instr) {
716 bool Assembler::IsVldrDPpImmediateOffset(Instr instr) {
723 bool Assembler::IsBlxReg(Instr instr) {
730 bool Assembler::IsBlxIp(Instr instr) {
737 bool Assembler::IsTstImmediate(Instr instr) {
743 bool Assembler::IsCmpRegister(Instr instr) {
749 bool Assembler::IsCmpImmediate(Instr instr) {
755 Register Assembler::GetCmpImmediateRegister(Instr instr) {
761 int Assembler::GetCmpImmediateRawImmediate(Instr instr) {
785 int Assembler::target_at(int pos) {
802 void Assembler::target_at_put(int pos, int target_pos) {
888 void Assembler::print(Label* L) {
946 void Assembler::bind_to(Label* L, int pos) {
962 void Assembler::bind(Label* L) {
968 void Assembler::next(Label* L) {
1010 *instr |= Assembler::EncodeMovwImmediate(imm32);
1046 bool Operand::must_output_reloc_info(const Assembler* assembler) const {
1048 if (assembler != NULL && assembler->predictable_code_size()) return true;
1049 return assembler->serializer_enabled();
1058 const Assembler* assembler) {
1059 if (assembler != NULL && !assembler->is_constant_pool_available()) {
1062 (assembler == NULL || !assembler->predictable_code_size())) {
1065 } else if (x.must_output_reloc_info(assembler)) {
1075 int Operand::instructions_required(const Assembler* assembler,
1079 if (must_output_reloc_info(assembler) ||
1085 if (use_mov_immediate_load(*this, assembler)) {
1088 } else if (assembler != NULL && assembler->use_extended_constant_pool()) {
1111 void Assembler::move_32_bit_immediate(Register rd,
1165 void Assembler::addrmod1(Instr instr,
1208 void Assembler::addrmod2(Instr instr, Register rd, const MemOperand& x) {
1240 void Assembler::addrmod3(Instr instr, Register rd, const MemOperand& x) {
1279 void Assembler::addrmod4(Instr instr, Register rn, RegList rl) {
1287 void Assembler::addrmod5(Instr instr, CRegister crd, const MemOperand& x) {
1312 int Assembler::branch_offset(Label* L, bool jump_elimination_allowed) {
1335 void Assembler::b(int branch_offset, Condition cond) {
1348 void Assembler::bl(int branch_offset, Condition cond) {
1357 void Assembler::blx(int branch_offset) { // v5 and above
1367 void Assembler::blx(Register target, Condition cond) { // v5 and above
1374 void Assembler::bx(Register target, Condition cond) { // v5 and above, plus v4t
1383 void Assembler::and_(Register dst, Register src1, const Operand& src2,
1389 void Assembler::eor(Register dst, Register src1, const Operand& src2,
1395 void Assembler::sub(Register dst, Register src1, const Operand& src2,
1401 void Assembler::rsb(Register dst, Register src1, const Operand& src2,
1407 void Assembler::add(Register dst, Register src1, const Operand& src2,
1413 void Assembler::adc(Register dst, Register src1, const Operand& src2,
1419 void Assembler::sbc(Register dst, Register src1, const Operand& src2,
1425 void Assembler::rsc(Register dst, Register src1, const Operand& src2,
1431 void Assembler::tst(Register src1, const Operand& src2, Condition cond) {
1436 void Assembler::teq(Register src1, const Operand& src2, Condition cond) {
1441 void Assembler::cmp(Register src1, const Operand& src2, Condition cond) {
1446 void Assembler::cmp_raw_immediate(
1453 void Assembler::cmn(Register src1, const Operand& src2, Condition cond) {
1458 void Assembler::orr(Register dst, Register src1, const Operand& src2,
1464 void Assembler::mov(Register dst, const Operand& src, SBit s, Condition cond) {
1476 void Assembler::mov_label_offset(Register dst, Label* label) {
1515 void Assembler::movw(Register reg, uint32_t immediate, Condition cond) {
1521 void Assembler::movt(Register reg, uint32_t immediate, Condition cond) {
1527 void Assembler::bic(Register dst, Register src1, const Operand& src2,
1533 void Assembler::mvn(Register dst, const Operand& src, SBit s, Condition cond) {
1539 void Assembler::mla(Register dst, Register src1, Register src2, Register srcA,
1547 void Assembler::mls(Register dst, Register src1, Register src2, Register srcA,
1556 void Assembler::sdiv(Register dst, Register src1, Register src2,
1565 void Assembler::udiv(Register dst, Register src1, Register src2,
1574 void Assembler::mul(Register dst, Register src1, Register src2,
1582 void Assembler::smlal(Register dstL,
1595 void Assembler::smull(Register dstL,
1608 void Assembler::umlal(Register dstL,
1621 void Assembler::umull(Register dstL,
1635 void Assembler::clz(Register dst, Register src, Condition cond) {
1646 void Assembler::usat(Register dst,
1673 void Assembler::ubfx(Register dst,
1693 void Assembler::sbfx(Register dst,
1712 void Assembler::bfc(Register dst, int lsb, int width, Condition cond) {
1727 void Assembler::bfi(Register dst,
1743 void Assembler::pkhbt(Register dst,
1762 void Assembler::pkhtb(Register dst,
1782 void Assembler::uxtb(Register dst,
1804 void Assembler::uxtab(Register dst,
1828 void Assembler::uxtb16(Register dst,
1851 void Assembler::mrs(Register dst, SRegister s, Condition cond) {
1857 void Assembler::msr(SRegisterFieldMask fields, const Operand& src,
1882 void Assembler::ldr(Register dst, const MemOperand& src, Condition cond) {
1890 void Assembler::str(Register src, const MemOperand& dst, Condition cond) {
1895 void Assembler::ldrb(Register dst, const MemOperand& src, Condition cond) {
1900 void Assembler::strb(Register src, const MemOperand& dst, Condition cond) {
1905 void Assembler::ldrh(Register dst, const MemOperand& src, Condition cond) {
1910 void Assembler::strh(Register src, const MemOperand& dst, Condition cond) {
1915 void Assembler::ldrsb(Register dst, const MemOperand& src, Condition cond) {
1920 void Assembler::ldrsh(Register dst, const MemOperand& src, Condition cond) {
1925 void Assembler::ldrd(Register dst1, Register dst2,
1936 void Assembler::strd(Register src1, Register src2,
1948 void Assembler::pld(const MemOperand& address) {
1967 void Assembler::ldm(BlockAddrMode am,
1988 void Assembler::stm(BlockAddrMode am,
1999 void Assembler::stop(const char* msg, Condition cond, int32_t code) {
2026 void Assembler::bkpt(uint32_t imm16) { // v5 and above
2032 void Assembler::svc(uint32_t imm24, Condition cond) {
2039 void Assembler::cdp(Coprocessor coproc,
2052 void Assembler::cdp2(Coprocessor coproc,
2062 void Assembler::mcr(Coprocessor coproc,
2075 void Assembler::mcr2(Coprocessor coproc,
2085 void Assembler::mrc(Coprocessor coproc,
2098 void Assembler::mrc2(Coprocessor coproc,
2108 void Assembler::ldc(Coprocessor coproc,
2117 void Assembler::ldc(Coprocessor coproc,
2130 void Assembler::ldc2(Coprocessor coproc,
2138 void Assembler::ldc2(Coprocessor coproc,
2149 void Assembler::vldr(const DwVfpRegister dst,
2183 void Assembler::vldr(const DwVfpRegister dst,
2197 void Assembler::vldr(const SwVfpRegister dst,
2231 void Assembler::vldr(const SwVfpRegister dst,
2245 void Assembler::vstr(const DwVfpRegister src,
2279 void Assembler::vstr(const DwVfpRegister src,
2293 void Assembler::vstr(const SwVfpRegister src,
2326 void Assembler::vstr(const SwVfpRegister src,
2340 void Assembler::vldm(BlockAddrMode am,
2361 void Assembler::vstm(BlockAddrMode am,
2381 void Assembler::vldm(BlockAddrMode am,
2401 void Assembler::vstm(BlockAddrMode am,
2481 void Assembler::vmov(const DwVfpRegister dst,
2561 void Assembler::vmov(const SwVfpRegister dst,
2573 void Assembler::vmov(const DwVfpRegister dst,
2589 void Assembler::vmov(const DwVfpRegister dst,
2605 void Assembler::vmov(const Register dst,
2621 void Assembler::vmov(const DwVfpRegister dst,
2637 void Assembler::vmov(const Register dst1,
2653 void Assembler::vmov(const SwVfpRegister dst,
2667 void Assembler::vmov(const Register dst,
2794 void Assembler::vcvt_f64_s32(const DwVfpRegister dst,
2802 void Assembler::vcvt_f32_s32(const SwVfpRegister dst,
2810 void Assembler::vcvt_f64_u32(const DwVfpRegister dst,
2818 void Assembler::vcvt_s32_f64(const SwVfpRegister dst,
2826 void Assembler::vcvt_u32_f64(const SwVfpRegister dst,
2834 void Assembler::vcvt_f64_f32(const DwVfpRegister dst,
2842 void Assembler::vcvt_f32_f64(const SwVfpRegister dst,
2850 void Assembler::vcvt_f64_s32(const DwVfpRegister dst,
2868 void Assembler::vneg(const DwVfpRegister dst,
2884 void Assembler::vabs(const DwVfpRegister dst,
2899 void Assembler::vadd(const DwVfpRegister dst,
2919 void Assembler::vsub(const DwVfpRegister dst,
2939 void Assembler::vmul(const DwVfpRegister dst,
2959 void Assembler::vmla(const DwVfpRegister dst,
2977 void Assembler::vmls(const DwVfpRegister dst,
2995 void Assembler::vdiv(const DwVfpRegister dst,
3015 void Assembler::vcmp(const DwVfpRegister src1,
3031 void Assembler::vcmp(const DwVfpRegister src1,
3045 void Assembler::vmsr(Register dst, Condition cond) {
3054 void Assembler::vmrs(Register dst, Condition cond) {
3063 void Assembler::vsqrt(const DwVfpRegister dst,
3080 void Assembler::vld1(NeonSize size,
3094 void Assembler::vst1(NeonSize size,
3108 void Assembler::vmovl(NeonDataType dt, QwNeonRegister dst, DwVfpRegister src) {
3123 void Assembler::nop(int type) {
3134 bool Assembler::IsMovT(Instr instr) {
3142 bool Assembler::IsMovW(Instr instr) {
3150 Instr Assembler::GetMovTPattern() { return kMovtPattern; }
3153 Instr Assembler::GetMovWPattern() { return kMovwPattern; }
3156 Instr Assembler::EncodeMovwImmediate(uint32_t immediate) {
3162 Instr Assembler::PatchMovwImmediate(Instr instruction, uint32_t immediate) {
3168 int Assembler::DecodeShiftImm(Instr instr) {
3175 Instr Assembler::PatchShiftImm(Instr instr, int immed) {
3185 bool Assembler::IsNop(Instr instr, int type) {
3192 bool Assembler::IsMovImmed(Instr instr) {
3197 bool Assembler::IsOrrImmed(Instr instr) {
3203 bool Assembler::ImmediateFitsAddrMode1Instruction(int32_t imm32) {
3210 bool Assembler::ImmediateFitsAddrMode2Instruction(int32_t imm32) {
3216 void Assembler::RecordJSReturn() {
3223 void Assembler::RecordDebugBreakSlot() {
3230 void Assembler::RecordComment(const char* msg) {
3238 void Assembler::RecordConstPool(int size) {
3245 void Assembler::GrowBuffer() {
3300 void Assembler::db(uint8_t data) {
3312 void Assembler::dd(uint32_t data) {
3324 void Assembler::emit_code_stub_address(Code* stub) {
3332 void Assembler::RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data) {
3338 void Assembler::RecordRelocInfo(const RelocInfo& rinfo) {
3360 ConstantPoolArray::LayoutSection Assembler::ConstantPoolAddEntry(
3386 void Assembler::BlockConstPoolFor(int instructions) {
3414 void Assembler::CheckConstPool(bool force_emit, bool require_jump) {
3619 Handle<ConstantPoolArray> Assembler::NewConstantPool(Isolate* isolate) {
3627 void Assembler::PopulateConstantPool(ConstantPoolArray* constant_pool) {
3657 Assembler* assm, const RelocInfo& rinfo) {
3722 void ConstantPoolBuilder::Populate(Assembler* assm,
3785 Instr next_instr = assm->instr_at(rinfo.pc() + Assembler::kInstrSize);
3786 DCHECK((Assembler::IsMovW(instr) &&
3788 DCHECK((Assembler::IsMovT(next_instr) &&
3791 rinfo.pc(), Assembler::PatchMovwImmediate(instr, offset & 0xffff));
3793 rinfo.pc() + Assembler::kInstrSize,
3794 Assembler::PatchMovwImmediate(next_instr, offset >> 16));
3797 Instr instr_2 = assm->instr_at(rinfo.pc() + Assembler::kInstrSize);
3798 Instr instr_3 = assm->instr_at(rinfo.pc() + 2 * Assembler::kInstrSize);
3799 Instr instr_4 = assm->instr_at(rinfo.pc() + 3 * Assembler::kInstrSize);
3800 DCHECK((Assembler::IsMovImmed(instr) &&
3802 DCHECK((Assembler::IsOrrImmed(instr_2) &&
3804 Assembler::GetRn(instr_2).is(Assembler::GetRd(instr_2)));
3805 DCHECK((Assembler::IsOrrImmed(instr_3) &&
3807 Assembler::GetRn(instr_3).is(Assembler::GetRd(instr_3)));
3808 DCHECK((Assembler::IsOrrImmed(instr_4) &&
3810 Assembler::GetRn(instr_4).is(Assembler::GetRd(instr_4)));
3812 rinfo.pc(), Assembler::PatchShiftImm(instr, (offset & kImm8Mask)));
3814 rinfo.pc() + Assembler::kInstrSize,
3815 Assembler::PatchShiftImm(instr_2, (offset & (kImm8Mask << 8))));
3817 rinfo.pc() + 2 * Assembler::kInstrSize,
3818 Assembler::PatchShiftImm(instr_3, (offset & (kImm8Mask << 16))));
3820 rinfo.pc() + 3 * Assembler::kInstrSize,
3821 Assembler::PatchShiftImm(instr_4, (offset & (kImm8Mask << 24))));
3825 DCHECK((Assembler::IsVldrDPpImmediateOffset(instr) &&
3826 Assembler::GetVldrDRegisterImmediateOffset(instr) == 0));
3828 assm->instr_at_put(rinfo.pc(), Assembler::SetVldrDRegisterImmediateOffset(
3832 DCHECK((Assembler::IsLdrPpImmediateOffset(instr) &&
3833 Assembler::GetLdrRegisterImmediateOffset(instr) == 0));
3836 rinfo.pc(), Assembler::SetLdrRegisterImmediateOffset(instr, offset));
