Lines Matching refs:sim_
35 explicit ArmDebugger(Simulator* sim) : sim_(sim) { }
46 Simulator* sim_;
88 reinterpret_cast<char**>(sim_->get_pc() + Instruction::kInstrSize);
106 sim_->set_pc(sim_->get_pc() + 2 * Instruction::kInstrSize);
119 char* msg = *reinterpret_cast<char**>(sim_->get_pc()
122 if (sim_->isWatchedStop(code) && !sim_->watched_stops_[code].desc) {
123 sim_->watched_stops_[code].desc = msg;
131 sim_->set_pc(sim_->get_pc() + 2 * Instruction::kInstrSize);
139 return sim_->get_pc();
141 return sim_->get_register(regnum);
147 return sim_->get_double_from_register_pair(regnum);
152 return sim_->get_double_from_d_register(regnum);
176 *value = sim_->get_float_from_s_register(regnum);
187 *value = sim_->get_double_from_d_register(regnum);
196 if (sim_->break_pc_ != NULL) {
201 sim_->break_pc_ = breakpc;
202 sim_->break_instr_ = breakpc->InstructionBits();
210 if (sim_->break_pc_ != NULL) {
211 sim_->break_pc_->SetInstructionBits(sim_->break_instr_);
214 sim_->break_pc_ = NULL;
215 sim_->break_instr_ = 0;
221 if (sim_->break_pc_ != NULL) {
222 sim_->break_pc_->SetInstructionBits(sim_->break_instr_);
228 if (sim_->break_pc_ != NULL) {
229 sim_->break_pc_->SetInstructionBits(kBreakpointInstr);
258 while (!done && !sim_->has_bad_pc()) {
259 if (last_pc != sim_->get_pc()) {
265 reinterpret_cast<byte*>(sim_->get_pc()));
266 PrintF(" 0x%08x %s\n", sim_->get_pc(), buffer.start());
267 last_pc = sim_->get_pc();
273 char* last_input = sim_->last_debugger_input();
277 // Ownership is transferred to sim_;
278 sim_->set_last_debugger_input(line);
288 sim_->InstructionDecode(reinterpret_cast<Instruction*>(sim_->get_pc()));
291 sim_->InstructionDecode(reinterpret_cast<Instruction*>(sim_->get_pc()));
367 cur = reinterpret_cast<int32_t*>(sim_->get_register(Simulator::sp));
417 cur = reinterpret_cast<byte*>(sim_->get_pc());
433 cur = reinterpret_cast<byte*>(sim_->get_pc());
475 PrintF("N flag: %d; ", sim_->n_flag_);
476 PrintF("Z flag: %d; ", sim_->z_flag_);
477 PrintF("C flag: %d; ", sim_->c_flag_);
478 PrintF("V flag: %d\n", sim_->v_flag_);
479 PrintF("INVALID OP flag: %d; ", sim_->inv_op_vfp_flag_);
480 PrintF("DIV BY ZERO flag: %d; ", sim_->div_zero_vfp_flag_);
481 PrintF("OVERFLOW flag: %d; ", sim_->overflow_vfp_flag_);
482 PrintF("UNDERFLOW flag: %d; ", sim_->underflow_vfp_flag_);
483 PrintF("INEXACT flag: %d;\n", sim_->inexact_vfp_flag_);
486 intptr_t stop_pc = sim_->get_pc() - 2 * Instruction::kInstrSize;
492 if (sim_->isStopInstruction(stop_instr)) {
503 sim_->kNumOfWatchedStops; i++) {
504 sim_->PrintStopInfo(i);
507 sim_->PrintStopInfo(value);
514 for (uint32_t i = 0; i < sim_->kNumOfWatchedStops; i++) {
515 sim_->EnableStop(i);
518 sim_->EnableStop(value);
525 for (uint32_t i = 0; i < sim_->kNumOfWatchedStops; i++) {
526 sim_->DisableStop(i);
529 sim_->DisableStop(value);
