Lines Matching refs:RegOut
1106 bool RegOut = LiveBundles[Bundles->getBundle(BC.Number, 1)];1112 Ins += RegOut != (BC.Exit == SpillPlacement::PrefReg);1120 bool RegOut = LiveBundles[Bundles->getBundle(Number, 1)];1121 if (!RegIn && !RegOut)1123 if (RegIn && RegOut) {