Lines Matching refs:Def
254 assert(MO.isDef() && "expect physreg def");
268 // Adjust the dependence latency using operand def/use information,
381 // The current operand is a def, so we have at least one.
386 // Add output dependence to the next nearest def of this vreg.
392 // is also useful if output latency exceeds def-use latency.
435 MachineInstr *Def = LIS->getInstructionFromIndex(VNI->def);
436 // Phis and other noninstructions (after coalescing) have a NULL Def.
437 if (Def) {
438 SUnit *DefSU = getSUnit(Def);
440 // The reaching Def lives within this scheduling region.
443 // Adjust the dependence latency using operand def/use information, then
445 int DefOp = Def->findRegisterDefOperandIdx(Reg);
446 dep.setLatency(SchedModel.computeOperandLatency(Def, DefOp, MI, OperIdx));
454 // Add antidependence to the following def of the vreg it uses.
834 // for vreg defs with no in-region use, and prefetches with no vreg def.
932 // Record the def in MemDefs, first adding a dep if there is
933 // an existing def.
1086 // If any subreg of MO is live, then create an imp-def for that
