Lines Matching refs:FNEG
452 // fneg is removable even if it has multiple uses.
453 if (Op.getOpcode() == ISD::FNEG) return 2;
476 // fold (fneg (fadd A, B)) -> (fsub (fneg A), B)
480 // fold (fneg (fadd A, B)) -> (fsub (fneg B), A)
487 // fold (fneg (fsub A, B)) -> (fsub B, A)
494 // fold (fneg (fmul X, Y)) -> (fmul (fneg X), Y) or (fmul X, (fneg Y))
514 // fneg is removable even if it has multiple uses.
515 if (Op.getOpcode() == ISD::FNEG) return Op.getOperand(0);
532 // fold (fneg (fadd A, B)) -> (fsub (fneg A), B)
540 // fold (fneg (fadd A, B)) -> (fsub (fneg B), A)
549 // fold (fneg (fsub 0, B)) -> B
554 // fold (fneg (fsub A, B)) -> (fsub B, A)
562 // fold (fneg (fmul X, Y)) -> (fmul (fneg X), Y)
571 // fold (fneg (fmul X, Y)) -> (fmul X, (fneg Y))
1255 case ISD::FNEG: return visitFNEG(N);
6251 // fold (bitconvert (fneg x)) -> (xor (bitconvert x), signbit)
6254 if (((N0.getOpcode() == ISD::FNEG && !TLI.isFNegFree(N0.getValueType())) ||
6263 if (N0.getOpcode() == ISD::FNEG)
6274 // folded to an fneg or fabs.
6486 // fold (fadd A, (fneg B)) -> (fsub A, B)
6491 // fold (fadd (fneg A), B) -> (fsub B, A)
6516 // If allow, fold (fadd (fneg x), x) -> 0.0
6518 N0.getOpcode() == ISD::FNEG && N0.getOperand(0) == N1)
6521 // If allow, fold (fadd x, (fneg x)) -> 0.0
6523 N1.getOpcode() == ISD::FNEG && N1.getOperand(0) == N0)
6699 if (!LegalOperations || TLI.isOperationLegal(ISD::FNEG, VT))
6700 return DAG.getNode(ISD::FNEG, dl, VT, N1);
6702 // fold (fsub A, (fneg B)) -> (fadd A, B)
6709 // (fsub x, (fadd x, y)) -> (fneg y) &
6710 // (fsub x, (fadd y, x)) -> (fneg y)
6735 // fold (fsub (fmul x, y), z) -> (fma x, y, (fneg z))
6739 DAG.getNode(ISD::FNEG, dl, VT, N1));
6741 // fold (fsub x, (fmul y, z)) -> (fma (fneg y), z, x)
6745 DAG.getNode(ISD::FNEG, dl, VT,
6749 // fold (fsub (fneg (fmul, x, y)), z) -> (fma (fneg x), y, (fneg z))
6750 if (N0.getOpcode() == ISD::FNEG &&
6756 DAG.getNode(ISD::FNEG, dl, VT, N00), N01,
6757 DAG.getNode(ISD::FNEG, dl, VT, N1));
6798 // fold (fmul X, -1.0) -> (fneg X)
6800 if (!LegalOperations || TLI.isOperationLegal(ISD::FNEG, VT))
6801 return DAG.getNode(ISD::FNEG, SDLoc(N), VT, N0);
6803 // fold (fmul (fneg X), (fneg Y)) -> (fmul X, Y)
6873 // (fma x, -1, y) -> (fadd (fneg x), y)
6879 (!LegalOperations || TLI.isOperationLegal(ISD::FNEG, VT))) {
6880 SDValue RHSNeg = DAG.getNode(ISD::FNEG, dl, VT, N0);
6892 // (fma x, c, (fneg x)) -> (fmul x, (c-1))
6894 N2.getOpcode() == ISD::FNEG && N2.getOperand(0) == N0)
6940 // (fdiv (fneg X), (fneg Y)) -> (fdiv X, Y)
6984 // copysign(x, c1) -> fneg(fabs(x)) iff isneg(c1)
6989 if (!LegalOperations || TLI.isOperationLegal(ISD::FNEG, VT))
6990 return DAG.getNode(ISD::FNEG, SDLoc(N), VT,
6996 // copysign(fneg(x), y) -> copysign(x, y)
6998 if (N0.getOpcode() == ISD::FABS || N0.getOpcode() == ISD::FNEG ||
7247 // Transform fneg(bitconvert(x)) -> bitconvert(x^sign) to avoid loading
7264 // (fneg (fmul c, x)) -> (fmul -c, x)
7275 DAG.getNode(ISD::FNEG, SDLoc(N), VT, N0.getOperand(1)));
7334 // fold (fabs (fneg x)) -> (fabs x)
7336 if (N0.getOpcode() == ISD::FNEG || N0.getOpcode() == ISD::FCOPYSIGN)
10930 /// SimplifyVUnaryOp - Visit a binary vector operation, like FABS/FNEG.
11135 // select (setg[te] X, +/-0.0), X, fneg(X) -> fabs
11137 N0 == N2 && N3.getOpcode() == ISD::FNEG &&
11141 // select (setl[te] X, +/-0.0), fneg(X), X -> fabs
11143 N0 == N3 && N2.getOpcode() == ISD::FNEG &&
