Lines Matching refs:SETCC
66 case ISD::SETCC: R = ScalarizeVecRes_SETCC(N); break;
274 if (Cond->getOpcode() == ISD::SETCC) {
335 // Turn it into a scalar SETCC.
336 return DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS, N->getOperand(2));
374 // Turn it into a scalar SETCC.
375 SDValue Res = DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS,
577 case ISD::SETCC:
1198 case ISD::SETCC: Res = SplitVecOp_VSETCC(N); break;
1501 LoRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Lo0, Lo1, N->getOperand(2));
1502 HiRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Hi0, Hi1, N->getOperand(2));
1564 case ISD::SETCC: Res = WidenVecRes_SETCC(N); break;
2315 return DAG.getNode(ISD::SETCC, SDLoc(N), WidenVT,
2370 return DAG.getNode(ISD::SETCC, SDLoc(N),
2402 case ISD::SETCC: Res = WidenVecOp_SETCC(N); break;
2609 // Get a new SETCC node to compare the newly widened operands.
2612 SDValue WideSETCC = DAG.getNode(ISD::SETCC, SDLoc(N),
