Cross Reference: /external/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp

Lines Matching refs:TII

82   const AArch64InstrInfo *TII;
115   TII = TM.getSubtarget<AArch64Subtarget>().getInstrInfo();
127                                              const TargetInstrInfo *TII) {
140     if (S == PrevBB && !TII->AnalyzeBranch(*PrevBB, TBB, FBB, Cond) &&
152                                       const TargetInstrInfo *TII) {
157   while ((FMBB = getBBFallenThrough(FMBB, TII))) {
169                                        const TargetInstrInfo *TII) {
173     MachineInstr *I = getLastNonPseudo(MBB, TII);
176     BuildMI(I->getParent(), DL, TII->get(AArch64::HINT)).addImm(0);
180     BuildMI(MBB, MI, DL, TII->get(AArch64::HINT)).addImm(0);
201   PrevInstr = getLastNonPseudo(MBB, TII);
230     insertNopBeforeInstruction(MBB, MI, TII);

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