Lines Matching refs:EXTRACT_SUBVECTOR
513 setOperationAction(ISD::EXTRACT_SUBVECTOR, VT.getSimpleVT(), Custom);
1582 case ISD::EXTRACT_SUBVECTOR:
4215 ShuffleSrcs[i] = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, CurSource,
4220 ShuffleSrcs[i] = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, CurSource,
4225 SDValue VEXTSrc1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, CurSource,
4227 SDValue VEXTSrc2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, CurSource,
4531 V0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, CastVT, V0,
4535 V1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, CastVT, V1,
4757 if (V1.getOpcode() == ISD::EXTRACT_SUBVECTOR) {
5680 llvm_unreachable("Unexpected vector type in extract_subvector!");
6594 // Remove extraneous bitcasts around an extract_subvector.
6597 // (extract_subvector (v2i64 (bitconvert (v8i16 ...)), (i64 1)))))
6599 // (extract_subvector ((v8i16 ...), (i64 4)))
6607 // Is the operand an extract_subvector starting at the beginning or halfway
6611 if (Op0->getOpcode() != ISD::EXTRACT_SUBVECTOR &&
6616 if (Op0->getOpcode() == ISD::EXTRACT_SUBVECTOR) {
6635 DEBUG(dbgs() << "aarch64-lower: bitcast extract_subvector simplification\n");
6643 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, Source, HalfIdx);
6749 // version on an extract_subvector of each operand which gets the high half:
6794 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, SDLoc(N.getNode()), NarrowTy,
6799 if (N.getOpcode() == ISD::EXTRACT_SUBVECTOR)
6803 N.getOperand(0).getOpcode() == ISD::EXTRACT_SUBVECTOR;
7220 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, Src,
7222 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, Src,
7344 SDValue SubVector0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, HalfVT, StVal,
7346 SDValue SubVector1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, HalfVT, StVal,
