Home | History | Annotate | Download | only in AArch64

Lines Matching refs:INSERT_VECTOR_ELT

367   setTargetDAGCombine(ISD::INSERT_VECTOR_ELT);
510 setOperationAction(ISD::INSERT_VECTOR_ELT, VT.getSimpleVT(), Custom);
1574 case ISD::INSERT_VECTOR_ELT:
4843 ISD::INSERT_VECTOR_ELT, dl, VT, DstVec,
5529 Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Val, V, LaneIdx);
5548 // If all else fails, just use a sequence of INSERT_VECTOR_ELT when we
5576 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Vec, V, LaneIdx);
5587 assert(Op.getOpcode() == ISD::INSERT_VECTOR_ELT && "Unknown opcode!");
5610 SDValue Node = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, WideTy, WideVec,
7247 if (StVal.getOpcode() != ISD::INSERT_VECTOR_ELT)
7260 if (NextInsertElt.getOpcode() != ISD::INSERT_VECTOR_ELT)
7742 case ISD::INSERT_VECTOR_ELT: