Lines Matching defs:Rt
855 unsigned Rt = fieldFromInstruction(insn, 0, 5);
865 // Rt is an immediate in prefetch.
866 Inst.addOperand(MCOperand::CreateImm(Rt));
876 DecodeGPR32RegisterClass(Inst, Rt, Addr, Decoder);
883 DecodeGPR64RegisterClass(Inst, Rt, Addr, Decoder);
887 DecodeFPR128RegisterClass(Inst, Rt, Addr, Decoder);
891 DecodeFPR64RegisterClass(Inst, Rt, Addr, Decoder);
895 DecodeFPR32RegisterClass(Inst, Rt, Addr, Decoder);
899 DecodeFPR16RegisterClass(Inst, Rt, Addr, Decoder);
903 DecodeFPR8RegisterClass(Inst, Rt, Addr, Decoder);
916 unsigned Rt = fieldFromInstruction(insn, 0, 5);
983 // Rt is an immediate in prefetch.
984 Inst.addOperand(MCOperand::CreateImm(Rt));
1018 DecodeGPR32RegisterClass(Inst, Rt, Addr, Decoder);
1040 DecodeGPR64RegisterClass(Inst, Rt, Addr, Decoder);
1048 DecodeFPR128RegisterClass(Inst, Rt, Addr, Decoder);
1056 DecodeFPR64RegisterClass(Inst, Rt, Addr, Decoder);
1064 DecodeFPR32RegisterClass(Inst, Rt, Addr, Decoder);
1072 DecodeFPR16RegisterClass(Inst, Rt, Addr, Decoder);
1080 DecodeFPR8RegisterClass(Inst, Rt, Addr, Decoder);
1092 if (IsLoad && IsIndexed && !IsFP && Rn != 31 && Rt == Rn)
1101 unsigned Rt = fieldFromInstruction(insn, 0, 5);
1130 DecodeGPR32RegisterClass(Inst, Rt, Addr, Decoder);
1140 DecodeGPR64RegisterClass(Inst, Rt, Addr, Decoder);
1148 DecodeGPR32RegisterClass(Inst, Rt, Addr, Decoder);
1157 DecodeGPR64RegisterClass(Inst, Rt, Addr, Decoder);
1167 Rt == Rt2)
1176 unsigned Rt = fieldFromInstruction(insn, 0, 5);
1236 DecodeGPR64RegisterClass(Inst, Rt, Addr, Decoder);
1249 DecodeGPR32RegisterClass(Inst, Rt, Addr, Decoder);
1260 DecodeFPR128RegisterClass(Inst, Rt, Addr, Decoder);
1271 DecodeFPR64RegisterClass(Inst, Rt, Addr, Decoder);
1282 DecodeFPR32RegisterClass(Inst, Rt, Addr, Decoder);
1291 if (IsLoad && Rt == Rt2)
1296 if (NeedsDisjointWritebackTransfer && Rn != 31 && (Rt == Rn || Rt2 == Rn))
1539 uint64_t Rt = fieldFromInstruction(insn, 0, 5);
1551 DecodeGPR32RegisterClass(Inst, Rt, Addr, Decoder);
1553 DecodeGPR64RegisterClass(Inst, Rt, Addr, Decoder);