Lines Matching refs:OpNum
640 int OpNum = LdStDesc->ListOperand;
641 printVectorList(MI, OpNum++, O, "");
644 O << '[' << MI->getOperand(OpNum++).getImm() << ']';
647 unsigned AddrReg = MI->getOperand(OpNum++).getReg();
652 unsigned Reg = MI->getOperand(OpNum++).getReg();
939 void AArch64InstPrinter::printAddSubImm(const MCInst *MI, unsigned OpNum,
941 const MCOperand &MO = MI->getOperand(OpNum);
946 AArch64_AM::getShiftValue(MI->getOperand(OpNum + 1).getImm());
949 printShifter(MI, OpNum + 1, O);
956 printShifter(MI, OpNum + 1, O);
960 void AArch64InstPrinter::printLogicalImm32(const MCInst *MI, unsigned OpNum,
962 uint64_t Val = MI->getOperand(OpNum).getImm();
967 void AArch64InstPrinter::printLogicalImm64(const MCInst *MI, unsigned OpNum,
969 uint64_t Val = MI->getOperand(OpNum).getImm();
974 void AArch64InstPrinter::printShifter(const MCInst *MI, unsigned OpNum,
976 unsigned Val = MI->getOperand(OpNum).getImm();
985 void AArch64InstPrinter::printShiftedRegister(const MCInst *MI, unsigned OpNum,
987 O << getRegisterName(MI->getOperand(OpNum).getReg());
988 printShifter(MI, OpNum + 1, O);
991 void AArch64InstPrinter::printExtendedRegister(const MCInst *MI, unsigned OpNum,
993 O << getRegisterName(MI->getOperand(OpNum).getReg());
994 printArithExtend(MI, OpNum + 1, O);
997 void AArch64InstPrinter::printArithExtend(const MCInst *MI, unsigned OpNum,
999 unsigned Val = MI->getOperand(OpNum).getImm();
1023 void AArch64InstPrinter::printMemExtend(const MCInst *MI, unsigned OpNum,
1026 unsigned SignExtend = MI->getOperand(OpNum).getImm();
1027 unsigned DoShift = MI->getOperand(OpNum + 1).getImm();
1040 void AArch64InstPrinter::printCondCode(const MCInst *MI, unsigned OpNum,
1042 AArch64CC::CondCode CC = (AArch64CC::CondCode)MI->getOperand(OpNum).getImm();
1046 void AArch64InstPrinter::printInverseCondCode(const MCInst *MI, unsigned OpNum,
1048 AArch64CC::CondCode CC = (AArch64CC::CondCode)MI->getOperand(OpNum).getImm();
1052 void AArch64InstPrinter::printAMNoIndex(const MCInst *MI, unsigned OpNum,
1054 O << '[' << getRegisterName(MI->getOperand(OpNum).getReg()) << ']';
1058 void AArch64InstPrinter::printImmScale(const MCInst *MI, unsigned OpNum,
1060 O << '#' << Scale * MI->getOperand(OpNum).getImm();
1063 void AArch64InstPrinter::printUImm12Offset(const MCInst *MI, unsigned OpNum,
1065 const MCOperand MO = MI->getOperand(OpNum);
1074 void AArch64InstPrinter::printAMIndexedWB(const MCInst *MI, unsigned OpNum,
1076 const MCOperand MO1 = MI->getOperand(OpNum + 1);
1077 O << '[' << getRegisterName(MI->getOperand(OpNum).getReg());
1087 void AArch64InstPrinter::printPrefetchOp(const MCInst *MI, unsigned OpNum,
1089 unsigned prfop = MI->getOperand(OpNum).getImm();
1098 void AArch64InstPrinter::printFPImmOperand(const MCInst *MI, unsigned OpNum,
1100 const MCOperand &MO = MI->getOperand(OpNum);
1153 void AArch64InstPrinter::printVectorList(const MCInst *MI, unsigned OpNum,
1156 unsigned Reg = MI->getOperand(OpNum).getReg();
1197 unsigned OpNum,
1199 printVectorList(MI, OpNum, O, "");
1203 void AArch64InstPrinter::printTypedVectorList(const MCInst *MI, unsigned OpNum,
1211 printVectorList(MI, OpNum, O, Suffix);
1214 void AArch64InstPrinter::printVectorIndex(const MCInst *MI, unsigned OpNum,
1216 O << "[" << MI->getOperand(OpNum).getImm() << "]";
1219 void AArch64InstPrinter::printAlignedLabel(const MCInst *MI, unsigned OpNum,
1221 const MCOperand &Op = MI->getOperand(OpNum);
1232 dyn_cast<MCConstantExpr>(MI->getOperand(OpNum).getExpr());
1239 O << *MI->getOperand(OpNum).getExpr();
1243 void AArch64InstPrinter::printAdrpLabel(const MCInst *MI, unsigned OpNum,
1245 const MCOperand &Op = MI->getOperand(OpNum);
1255 O << *MI->getOperand(OpNum).getExpr();
