Lines Matching refs:Rs
931 unsigned Rs = MO1.getReg();
932 if (Rs) {
965 // Encode the shift operation Rs or shift_imm (except rrx).
966 if (Rs) {
967 // Encode Rs bit[11:8].
969 return Binary | (II->getRegisterInfo().getEncodingValue(Rs) << ARMII::RegRsShift);
1326 // Encode Rs
