Cross Reference: /external/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp

Lines Matching full:getnode
292   return isInt32Immediate(N.getNode(), Imm);
300          isInt32Immediate(N->getOperand(1).getNode(), Imm);
349     if (!isOpcWithIntImmediate(N1.getNode(), ISD::AND, And_imm)) {
350       if (isOpcWithIntImmediate(N0.getNode(), ISD::AND, And_imm))
376     if (!isOpcWithIntImmediate(Srl.getNode(), ISD::SRL, Srl_imm) ||
395     Srl = CurDAG->getNode(ISD::SRL, SDLoc(Srl), MVT::i32,
398     N1 = CurDAG->getNode(ISD::AND, SDLoc(N1), MVT::i32,
400     N1 = CurDAG->getNode(ISD::SHL, SDLoc(N1), MVT::i32,
1565   SDLoc dl(V0.getNode());
1576   SDLoc dl(V0.getNode());
1587   SDLoc dl(V0.getNode());
1597   SDLoc dl(V0.getNode());
1608   SDLoc dl(V0.getNode());
1623   SDLoc dl(V0.getNode());
1637   SDLoc dl(V0.getNode());
1838       if ((NumVecs <= 2) && !isa<ConstantSDNode>(Inc.getNode()))
1843           !isa<ConstantSDNode>(Inc.getNode()))
1844         Ops.push_back(isa<ConstantSDNode>(Inc.getNode()) ? Reg0 : Inc);
1870       assert(isa<ConstantSDNode>(Inc.getNode()) &&
1988       if (NumVecs <= 2 && !isa<ConstantSDNode>(Inc.getNode()))
1992       if  (!isa<ConstantSDNode>(Inc.getNode()))
2035     assert(isa<ConstantSDNode>(Inc.getNode()) &&
2121     Ops.push_back(isa<ConstantSDNode>(Inc.getNode()) ? Reg0 : Inc);
2220     if (!isa<ConstantSDNode>(Inc.getNode()))
2304       if (isOpcWithIntImmediate(N->getOperand(0).getNode(), ISD::SRL,
2346   if (isOpcWithIntImmediate(N->getOperand(0).getNode(), ISD::SHL, Shl_imm)) {
2578     if (N0.getOpcode() == ISD::OR && N0.getNode()->hasOneUse()) {
2712                 SDValue(Chain.getNode(), Chain.getResNo()));
3396       GU = T1.getNode();
3422     if(PairedReg.getNode()) {
3439   if (Glue.getNode())
3444   SDValue New = CurDAG->getNode(ISD::INLINEASM, SDLoc(N),
3447   return New.getNode();
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