Lines Matching refs:v8i8
426 addDRTypeForNEON(MVT::v8i8);
518 setOperationAction(ISD::SDIV, MVT::v8i8, Custom);
520 setOperationAction(ISD::UDIV, MVT::v8i8, Custom);
537 // v8i8/v16i8 vcnt instruction.
568 MVT Tys[6] = {MVT::v8i8, MVT::v4i8, MVT::v2i8,
905 case MVT::f32: case MVT::f64: case MVT::v8i8: case MVT::v4i16:
3841 AllOnes = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v8i8, AllOnes);
4100 /// getCTPOP16BitCounts - Returns a v8i8/v16i8 vector containing the bit-count
4117 EVT VT8Bit = VT.is64BitVector() ? MVT::v8i8 : MVT::v16i8;
4132 /// v8i8: BitCounts = [k0 k1 k2 k3 k0 k1 k2 k3 ] (ki is the bit-count of vi)
4145 SDValue Extracted = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, MVT::v8i8,
4436 VT = is128Bits ? MVT::v16i8 : MVT::v8i8;
4730 return VT == MVT::v8i8 && M.size() == 8;
5387 return DAG.getNode(ARMISD::VTBL1, DL, MVT::v8i8, V1,
5388 DAG.getNode(ISD::BUILD_VECTOR, DL, MVT::v8i8, VTBLMask));
5390 return DAG.getNode(ARMISD::VTBL2, DL, MVT::v8i8, V1, V2,
5391 DAG.getNode(ISD::BUILD_VECTOR, DL, MVT::v8i8, VTBLMask));
5551 if (VT == MVT::v8i8) {
5949 assert((VT == MVT::v4i16 || VT == MVT::v8i8) &&
5957 if (VT == MVT::v8i8) {
5976 N0 = DAG.getNode(ISD::TRUNCATE, dl, MVT::v8i8, N0);
5984 assert((VT == MVT::v4i16 || VT == MVT::v8i8) &&
5992 if (VT == MVT::v8i8) {
6011 N0 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v8i8,
