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Lines Matching refs:BaseReg

1363                           unsigned BaseReg, bool BaseKill, bool BaseUndef,
1371       .addReg(BaseReg, getKillRegState(BaseKill)|getUndefRegState(BaseUndef));
1377       .addReg(BaseReg, getKillRegState(BaseKill)|getUndefRegState(BaseUndef));
1389     unsigned BaseReg = BaseOp.getReg();
1396     bool Errata602117 = EvenReg == BaseReg && STI->isCortexM3();
1426           .addReg(BaseReg, getKillRegState(BaseKill))
1433           .addReg(BaseReg, getKillRegState(BaseKill))
1457           (TRI->regsOverlap(EvenReg, BaseReg))) {
1458         assert(!TRI->regsOverlap(OddReg, BaseReg));
1461                       BaseReg, false, BaseUndef, false, OffUndef,
1466                       BaseReg, BaseKill, BaseUndef, OffKill, OffUndef,
1477         if (EvenReg == BaseReg)
1481                       BaseReg, false, BaseUndef, false, OffUndef,
1486                       BaseReg, BaseKill, BaseUndef, OffKill, OffUndef,
1782                           unsigned &OddReg, unsigned &BaseReg,
1878                                           unsigned &OddReg, unsigned &BaseReg,
1942   BaseReg = Op0->getOperand(1).getReg();
2037         unsigned BaseReg = 0, PredReg = 0;
2044                                              EvenReg, OddReg, BaseReg,
2059               .addReg(BaseReg);
2073               .addReg(BaseReg);