Lines Matching refs:TII
70 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
76 BuildMI(MBB, MBBI, dl, TII.get(ARM::tLDRpci))
93 const TargetInstrInfo &TII,
115 AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVi8), LdReg))
118 AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVi8), LdReg))
120 AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tRSB), LdReg))
129 BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg);
169 int NumBytes, const TargetInstrInfo &TII,
229 TII, MRI, MIFlags);
239 const MCInstrDesc &MCID = TII.get(isSub ? ARM::tSUBi3 : ARM::tADDi3);
245 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), DestReg)
259 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg);
267 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg);
289 const MCInstrDesc &MCID = TII.get(ExtraOpc);
302 const TargetInstrInfo &TII,
311 AddDefaultPred(AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVi8),
315 emitThumbRegPlusImmediate(MBB, MBBI, dl, DestReg, DestReg, Imm, TII, MRI);
317 const MCInstrDesc &MCID = TII.get(ARM::tRSB);
346 const ARMBaseInstrInfo &TII) const {
374 MI.setDesc(TII.get(ARM::tMOVr));
386 MI.setDesc(TII.get(Opcode));
403 emitThumbRegPlusImmediate(MBB, II, dl, DestReg, FrameReg, Offset, TII,
414 MI.setDesc(TII.get(Opcode));
423 emitThumbRegPlusImmediate(MBB, NII, dl, DestReg, DestReg, Offset, TII,
429 emitThumbConstant(MBB, II, DestReg, Offset, TII, *this, dl);
431 MI.setDesc(TII.get(ARM::tADDhirr));
462 MI.setDesc(TII.get(NewOpc));
487 const ARMBaseInstrInfo &TII =
497 bool Done = rewriteFrameIndex(MI, i, BaseReg, Off, TII);
515 const TargetInstrInfo &TII = *MBB.getParent()->getTarget().getInstrInfo();
517 AddDefaultPred(BuildMI(MBB, I, DL, TII.get(ARM::tMOVr))
547 AddDefaultPred(BuildMI(MBB, UseMI, DL, TII.get(ARM::tMOVr)).
561 const ARMBaseInstrInfo &TII =
609 if (rewriteFrameIndex(MI, FIOperandNum, FrameReg, Offset, TII))
631 Offset, false, TII, *this);
637 emitThumbRegPlusImmediate(MBB, II, dl, TmpReg, FrameReg, Offset, TII,
641 MI.setDesc(TII.get(UseRR ? ARM::tLDRr : ARM::tLDRi));
655 Offset, false, TII, *this);
661 emitThumbRegPlusImmediate(MBB, II, dl, VReg, FrameReg, Offset, TII,
663 MI.setDesc(TII.get(UseRR ? ARM::tSTRr : ARM::tSTRi));
