Lines Matching refs:SETCC
215 // setcc operations results (slt, sgt, ...).
233 // Used by legalize types to correctly generate the setcc result.
234 // Without this, every float setcc comes with a AND/OR with the result,
237 AddPromotedToType(ISD::SETCC, MVT::i1, MVT::i32);
251 setOperationAction(ISD::SETCC, MVT::f32, Custom);
252 setOperationAction(ISD::SETCC, MVT::f64, Custom);
504 // Creates and returns an FPCmp node from a setcc node.
505 // Returns Op if setcc is not a floating point comparison.
507 // must be a SETCC node
508 if (Op.getOpcode() != ISD::SETCC)
544 SDValue SetCC = N->getOperand(0);
546 if ((SetCC.getOpcode() != ISD::SETCC) ||
547 !SetCC.getOperand(0).getValueType().isInteger())
571 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC.getOperand(2))->get();
574 SetCC = DAG.getSetCC(DL, SetCC.getValueType(), SetCC.getOperand(0),
575 SetCC.getOperand(1), ISD::getSetCCInverse(CC, true));
577 return DAG.getNode(ISD::SELECT, DL, FalseTy, SetCC, False, True);
590 // of a SETCC operator is always MVT::i32 for non-vector types.
600 return DAG.getNode(ISD::ADD, DL, SetCC.getValueType(), SetCC, False);
607 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC.getOperand(2))->get();
608 SetCC = DAG.getSetCC(DL, SetCC.getValueType(), SetCC.getOperand(0),
609 SetCC.getOperand(1), ISD::getSetCCInverse(CC, true));
610 return DAG.getNode(ISD::ADD, DL, SetCC.getValueType(), SetCC, True);
792 case ISD::SETCC: return lowerSETCC(Op, DAG);
1548 SDValue Cond = DAG.getNode(ISD::SETCC, DL,
