Lines Matching refs:SETCC
81 setTargetDAGCombine(ISD::SETCC);
175 setOperationAction(ISD::SETCC, MVT::i32, Legal);
179 setOperationAction(ISD::SETCC, MVT::f32, Legal);
184 setOperationAction(ISD::SETCC, MVT::f64, Legal);
220 setOperationAction(ISD::SETCC, MVT::i64, Legal);
282 setOperationAction(ISD::SETCC, Ty, Legal);
319 setOperationAction(ISD::SETCC, Ty, Legal);
985 // (vselect (setcc $a, $b, SETLT), $b, $a)) -> (vsmax $a, $b)
986 // (vselect (setcc $a, $b, SETLE), $b, $a)) -> (vsmax $a, $b)
987 // (vselect (setcc $a, $b, SETLT), $a, $b)) -> (vsmin $a, $b)
988 // (vselect (setcc $a, $b, SETLE), $a, $b)) -> (vsmin $a, $b)
989 // (vselect (setcc $a, $b, SETULT), $b, $a)) -> (vumax $a, $b)
990 // (vselect (setcc $a, $b, SETULE), $b, $a)) -> (vumax $a, $b)
991 // (vselect (setcc $a, $b, SETULT), $a, $b)) -> (vumin $a, $b)
992 // (vselect (setcc $a, $b, SETULE), $a, $b)) -> (vumin $a, $b)
998 if (Op0->getOpcode() != ISD::SETCC)
1023 SDValue SetCC = N->getOperand(0);
1025 if (SetCC.getOpcode() != MipsISD::SETCC_DSP)
1029 SetCC.getOperand(0), SetCC.getOperand(1),
1030 N->getOperand(1), N->getOperand(2), SetCC.getOperand(2));
1092 case ISD::SETCC:
