Cross Reference: /external/llvm/lib/Target/R600/SIFixSGPRCopies.cpp

Lines Matching refs:getRegClass

124     if (TRI->hasVGPRs(MRI.getRegClass(MI.getOperand(i).getReg())))
143   const TargetRegisterClass *RC = MRI.getRegClass(Reg);
170     return TRI->getSubRegClass(MRI.getRegClass(Reg), SubReg);
184   const TargetRegisterClass *DstRC = MRI.getRegClass(DstReg);
189       MRI.getRegClass(SrcReg) == &AMDGPU::VReg_1RegClass)
192   SrcRC = TRI->getSubRegClass(MRI.getRegClass(SrcReg), SrcSubReg);
235         if (!TRI->isSGPRClass(MRI.getRegClass(Reg)))
242           if (TRI->hasVGPRs(MRI.getRegClass(Reg))) {
263         DstRC = MRI.getRegClass(MI.getOperand(0).getReg());
264         Src0RC = MRI.getRegClass(MI.getOperand(1).getReg());
265         Src1RC = MRI.getRegClass(MI.getOperand(2).getReg());

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