Lines Matching refs:SETCC
114 setOperationAction(ISD::SETCC, MVT::v2i1, Expand);
115 setOperationAction(ISD::SETCC, MVT::v4i1, Expand);
222 setTargetDAGCombine(ISD::SETCC);
774 if (Intr->getOpcode() == ISD::SETCC) {
776 SDNode *SetCC = Intr;
777 assert(SetCC->getConstantOperandVal(1) == 1);
778 assert(cast<CondCodeSDNode>(SetCC->getOperand(2).getNode())->get() ==
780 Intr = SetCC->getOperand(0).getNode();
1119 // i1 selectcc(l, r, -1, 0, cc) -> i1 setcc(l, r, cc)
1125 return DAG.getNode(ISD::SETCC, DL, VT, N->getOperand(0),
1131 case ISD::SETCC: {
1138 // i1 setcc (sext(i1), 0, setne) -> i1 setcc(i1, 0, setne)
