Lines Matching defs:is64Bit
176 if (Subtarget->is64Bit())
328 if (Subtarget->is64Bit())
655 if (Subtarget->is64Bit())
1377 if (Subtarget->is64Bit())
1410 if (Subtarget->is64Bit()) {
1457 if (Subtarget->is64Bit()) {
1498 if (Subtarget->is64Bit()) {
1548 if (Subtarget->is64Bit()) {
1608 if (!Subtarget->is64Bit()) {
1631 if (Subtarget->is64Bit()) {
2020 if (!Subtarget->is64Bit())
2061 bool is64Bit = Subtarget->is64Bit();
2064 case SPCC::FCC_E : LibCall = is64Bit? "_Qp_feq" : "_Q_feq"; break;
2065 case SPCC::FCC_NE : LibCall = is64Bit? "_Qp_fne" : "_Q_fne"; break;
2066 case SPCC::FCC_L : LibCall = is64Bit? "_Qp_flt" : "_Q_flt"; break;
2067 case SPCC::FCC_G : LibCall = is64Bit? "_Qp_fgt" : "_Q_fgt"; break;
2068 case SPCC::FCC_LE : LibCall = is64Bit? "_Qp_fle" : "_Q_fle"; break;
2069 case SPCC::FCC_GE : LibCall = is64Bit? "_Qp_fge" : "_Q_fge"; break;
2077 case SPCC::FCC_UE : LibCall = is64Bit? "_Qp_cmp" : "_Q_cmp"; break;
2413 unsigned regSpillArea = Subtarget->is64Bit() ? 128 : 96;
2444 if (Subtarget->is64Bit())
2454 unsigned Offset = (Subtarget->is64Bit()) ? (stackBias + 112) : 56;
2462 if (Subtarget->is64Bit())
2503 unsigned Offset = (Subtarget->is64Bit()) ? 120 : 60;
2989 bool is64Bit = SP::I64RegsRegClass.hasSubClassEq(MRI.getRegClass(DestReg));
2991 is64Bit ? &SP::I64RegsRegClass : &SP::IntRegsRegClass;
2994 BuildMI(*MBB, MI, DL, TII.get(is64Bit ? SP::LDXri : SP::LDri), Val0Reg)
3043 BuildMI(LoopMBB, DL, TII.get(is64Bit ? SP::CASXrr : SP::CASrr), DestReg)
3047 BuildMI(LoopMBB, DL, TII.get(is64Bit ? SP::BPXCC : SP::BCOND))
