Lines Matching refs:BaseReg
482 unsigned BaseReg = Base.getReg();
485 if (BaseReg == X86::RIP ||
500 // If no BaseReg, issue a RIP relative instruction only if the MCE can
504 if (BaseReg != 0 && BaseReg != X86::RIP)
505 BaseRegNo = getX86RegNum(BaseReg);
515 (!Is64BitMode || BaseReg != 0)) {
516 if (BaseReg == 0 || // [disp32] in X86-32 mode
517 BaseReg == X86::RIP) { // [disp32+RIP] in X86-64 mode
551 if (BaseReg == 0) {
576 if (BaseReg == 0) {
586 unsigned BaseRegNo = getX86RegNum(BaseReg);
613 const MachineOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg);
616 if ((BaseReg.getReg() != 0 &&
617 X86MCRegisterClasses[X86::GR16RegClassID].contains(BaseReg.getReg())) ||
627 const MachineOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg);
630 if ((BaseReg.getReg() != 0 &&
631 X86MCRegisterClasses[X86::GR32RegClassID].contains(BaseReg.getReg())) ||
642 const MachineOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg);
645 if ((BaseReg.getReg() != 0 &&
646 X86MCRegisterClasses[X86::GR64RegClassID].contains(BaseReg.getReg())) ||
