Lines Matching refs:LoReg
2219 unsigned LoReg;
2222 case MVT::i8: LoReg = X86::AL; Opc = X86::MUL8r; break;
2223 case MVT::i16: LoReg = X86::AX; Opc = X86::MUL16r; break;
2224 case MVT::i32: LoReg = X86::EAX; Opc = X86::MUL32r; break;
2225 case MVT::i64: LoReg = X86::RAX; Opc = X86::MUL64r; break;
2228 SDValue InFlag = CurDAG->getCopyToReg(CurDAG->getEntryNode(), dl, LoReg,
2268 unsigned SrcReg, LoReg, HiReg;
2273 SrcReg = LoReg = X86::AL; HiReg = X86::AH;
2277 SrcReg = LoReg = X86::AX; HiReg = X86::DX;
2281 SrcReg = LoReg = X86::EAX; HiReg = X86::EDX;
2285 SrcReg = LoReg = X86::RAX; HiReg = X86::RDX;
2288 SrcReg = X86::EDX; LoReg = HiReg = 0;
2291 SrcReg = X86::RDX; LoReg = HiReg = 0;
2366 assert(LoReg && "Register for low half is not defined!");
2367 ResLo = CurDAG->getCopyFromReg(CurDAG->getEntryNode(), dl, LoReg, NVT,
2413 unsigned LoReg, HiReg, ClrReg;
2418 LoReg = X86::AL; ClrReg = HiReg = X86::AH;
2422 LoReg = X86::AX; HiReg = X86::DX;
2427 LoReg = X86::EAX; ClrReg = HiReg = X86::EDX;
2431 LoReg = X86::RAX; ClrReg = HiReg = X86::RDX;
2462 LoReg, N0, SDValue()).getValue(1);
2541 LoReg, NVT, InFlag);
