Lines Matching refs:UNDEF
87 // Extract from UNDEF is UNDEF.
88 if (Vec.getOpcode() == ISD::UNDEF)
137 // Inserting UNDEF is Result
138 if (Vec.getOpcode() == ISD::UNDEF)
700 setOperationAction(ISD::UNDEF, MVT::f64, Expand);
729 setOperationAction(ISD::UNDEF, MVT::f64, Expand);
730 setOperationAction(ISD::UNDEF, MVT::f32, Expand);
759 setOperationAction(ISD::UNDEF, MVT::f80, Expand);
3666 /// isUndefOrInRange - Return true if Val is undef or if its value falls within
3672 /// isUndefOrEqual - Val is either less than zero (undef) or equal to the
3680 /// sequential range (L, L+Pos]. or is undef.
3706 // Lower quadword copied in order or undef.
3716 // Lower quadword copied in order or undef.
3781 // Lane is all undef, go to next lane
3926 /// of vector_shuffle v, v, <2, 3, 2, 3>, i.e. vector_shuffle v, undef,
4047 SDValue UndefNode = DAG.getNode(ISD::UNDEF, dl, VT);
4161 /// of vector_shuffle v, v, <0, 4, 1, 5>, i.e. vector_shuffle v, undef,
4204 /// of vector_shuffle v, v, <2, 6, 3, 7>, i.e. vector_shuffle v, undef,
4817 case ISD::UNDEF:
4872 if (Opc == ISD::UNDEF || ISD::isBuildVectorAllZeros(V2.getNode()))
4879 if (Opc == ISD::UNDEF || ISD::isBuildVectorAllZeros(V1.getNode()))
5093 /// vector of zero or undef vector. This produces a shuffle where the low
5094 /// element of V2 is swizzled into the zero/undef vector, landing at element
5273 else if (Elt.getOpcode() == ISD::UNDEF) // Undef as zero up to PreferredNum.
5294 // Ignore undef indicies
5487 while (FirstNonZero.getOpcode() == ISD::UNDEF ||
5510 if (Elem.getOpcode() == ISD::UNDEF || X86::isZeroNode(Elem))
5644 /// Example: <load i32 *a, load i32 *a+4, undef, undef> -> zextload a
5647 /// rather than undef via VZEXT_LOAD, but we do not detect that case today.
5658 // For each element in the initializer, see if we've found a load or an undef.
5665 (Elt.getOpcode() != ISD::UNDEF && !ISD::isNON_EXTLoad(Elt.getNode())))
5668 if (Elt.getNode()->getOpcode() == ISD::UNDEF)
5674 if (Elt.getOpcode() == ISD::UNDEF)
5901 // undef)
5938 if (Opc == ISD::UNDEF)
6020 if (In.getOpcode() == ISD::UNDEF)
6107 if (Op->getOpcode() == ISD::UNDEF) {
6137 if (V0.getOpcode() == ISD::UNDEF)
6140 if (V1.getOpcode() == ISD::UNDEF)
6190 /// If \p isUndefLO is set, then the algorithm propagates UNDEF to the lower
6191 /// 128-bits of the result. If \p isUndefHI is set, then UNDEF is propagated to
6212 // Don't emit a horizontal binop if the result is expected to be UNDEF.
6213 UNDEF)
6215 if (!isUndefHI && V1->getOpcode() != ISD::UNDEF)
6218 // Don't emit a horizontal binop if the result is expected to be UNDEF.
6219 if (!isUndefLO && (V0_LO->getOpcode() != ISD::UNDEF ||
6220 V1_LO->getOpcode() != ISD::UNDEF))
6223 if (!isUndefHI && (V0_HI->getOpcode() != ISD::UNDEF ||
6224 V1_HI->getOpcode() != ISD::UNDEF))
6261 // Skip 'undef' values.
6263 if (Opcode == ISD::UNDEF) {
6296 if (InVec0.getOpcode() == ISD::UNDEF)
6298 if (InVec1.getOpcode() == ISD::UNDEF)
6322 // too many UNDEF operands.
6323 if (AddFound && SubFound && InVec0.getOpcode() != ISD::UNDEF &&
6324 InVec1.getOpcode() != ISD::UNDEF) {
6373 // Count the number of UNDEF operands in the build_vector in input.
6375 if (BV->getOperand(i)->getOpcode() == ISD::UNDEF)
6379 if (BV->getOperand(i)->getOpcode() == ISD::UNDEF)
6383 // operands but one are UNDEF.
6412 ((InVec0.getOpcode() == ISD::UNDEF ||
6413 InVec2.getOpcode() == ISD::UNDEF) || InVec0 == InVec2) &&
6414 ((InVec1.getOpcode() == ISD::UNDEF ||
6415 InVec3.getOpcode() == ISD::UNDEF) || InVec1 == InVec3))
6420 ((InVec0.getOpcode() == ISD::UNDEF ||
6421 InVec2.getOpcode() == ISD::UNDEF) || InVec0 == InVec2) &&
6422 ((InVec1.getOpcode() == ISD::UNDEF ||
6423 InVec3.getOpcode() == ISD::UNDEF) || InVec1 == InVec3))
6433 ((InVec0.getOpcode() == ISD::UNDEF ||
6434 InVec2.getOpcode() == ISD::UNDEF) || InVec0 == InVec2) &&
6435 ((InVec1.getOpcode() == ISD::UNDEF ||
6436 InVec3.getOpcode() == ISD::UNDEF) || InVec1 == InVec3))
6440 ((InVec0.getOpcode() == ISD::UNDEF ||
6441 InVec2.getOpcode() == ISD::UNDEF) || InVec0 == InVec2) &&
6442 ((InVec1.getOpcode() == ISD::UNDEF ||
6443 InVec3.getOpcode() == ISD::UNDEF) || InVec1 == InVec3))
6544 if (Elt.getOpcode() == ISD::UNDEF)
6558 // All undef vector. Return an UNDEF. All zero vectors were handled above.
6562 // Special case for single non-zero, non-undef, element.
6670 // shuffle (scalar_to_vector (load (ptr + 4))), undef, <0, 0, 0, 0>
6672 // shuffle (vload ptr)), undef, <1, 1, 1, 1>
6710 // One half is zero or undef.
6798 if (Op.getOperand(0).getOpcode() != ISD::UNDEF)
6804 if (Op.getOperand(i).getOpcode() == ISD::UNDEF) continue;
6812 // our (non-undef) elements to the full vector width with the element in the
6815 if (Op.getOperand(i).getOpcode() != ISD::UNDEF)
6828 // If V[i+EltStride] is undef and this is the first round of mixing,
6831 // inserted as undef can be dropped. This isn't safe for successive
6833 if (V[i+EltStride].getOpcode() == ISD::UNDEF &&
6902 /// ShuffleVectorSDNode mask) requires any shuffles to occur. Both undef and an
6933 /// NB: We rely heavily on "undef" masks preserving the input lane.
7061 // Handles all the cases where we have a single V2 element and an undef.
7930 bool V1IsUndef = V1.getOpcode() == ISD::UNDEF;
7931 bool V2IsUndef = V2.getOpcode() == ISD::UNDEF;
7935 // When we create a shuffle node we put the UNDEF node to second operand,
7936 // but in some cases the first operand may be transformed to UNDEF.
7941 // Check for non-undef masks pointing at an undef vector and make the masks
7942 // undef as well. This makes it easier to match the shuffle based solely on
8101 /// MaskVals refers to elements outside of \p V1 or is undef (-1), insert a
8157 // of the result come from the same quadword of one of the two inputs. Undef
8394 if (V2.getOpcode() != ISD::UNDEF)
8428 // undef mask values to 0x80 (zero out result) in the pshufb mask.
8445 if (V2.getOpcode() == ISD::UNDEF ||
8473 // This word of the result is all undef, skip it.
8543 bool V2IsUndef = V2.getOpcode() == ISD::UNDEF;
8905 V.getNumOperands() == 2 && V.getOperand(1).getOpcode() == ISD::UNDEF)
8906 // BUILD_VECTOR (load), undef
8951 if (V2.getOpcode() == ISD::UNDEF)
9126 if (V2.getOpcode() != ISD::UNDEF || !VT.isInteger() ||
9256 bool V1IsUndef = V1.getOpcode() == ISD::UNDEF;
9257 bool V2IsUndef = V2.getOpcode() == ISD::UNDEF;
9277 // When we create a shuffle node we put the UNDEF node to second operand,
9278 // but in some cases the first operand may be transformed to UNDEF.
9413 // Canonicalize the splat or undef, if present, to be on the RHS.
9422 // Shuffling low element of v1 into undef, just return v1.
9598 // undef SDNodes. i.e: ISD::isBuildVectorOfConstantSDNodes(BuildVector) is
9985 if (Vec.getOpcode() == ISD::UNDEF)
11101 SDValue Undef = DAG.getUNDEF(InVT);
11103 SDValue OpLo = getUnpackl(DAG, dl, InVT, In, NeedZero ? ZeroVec : Undef);
11104 SDValue OpHi = getUnpackh(DAG, dl, InVT, In, NeedZero ? ZeroVec : Undef);
11287 SDValue Undef = DAG.getUNDEF(MVT::v16i8);
11288 OpLo = DAG.getVectorShuffle(MVT::v16i8, DL, OpLo, Undef, ShufMask1);
11289 OpHi = DAG.getVectorShuffle(MVT::v16i8, DL, OpHi, Undef, ShufMask1);
12783 SDValue Undef = DAG.getUNDEF(InVT);
12789 SDValue OpLo = DAG.getVectorShuffle(InVT, dl, In, Undef, &ShufMask1[0]);
12795 SDValue OpHi = DAG.getVectorShuffle(InVT, dl, In, Undef, &ShufMask2[0]);
13400 if (CurrentOp->getOpcode() == ISD::UNDEF) {
13412 if (CurrentOp->getOpcode() == ISD::UNDEF) {
13424 if (CurrentOp->getOpcode() == ISD::UNDEF) {
14215 if (Src.getOpcode() == ISD::UNDEF)
15397 if (Amt.getOperand(i).getOpcode() == ISD::UNDEF)
15403 if (Arg.getOpcode() == ISD::UNDEF) continue;
15420 if (Arg.getOpcode() == ISD::UNDEF) continue;
15571 if (Op->getOpcode() == ISD::UNDEF) {
16019 // Explicitly mark the extra elements as Undef.
16020 SDValue Undef = DAG.getUNDEF(SVT);
16022 Elts.push_back(Undef);
18344 // V UNDEF BUILD_VECTOR UNDEF
18352 V2.getOperand(1).getOpcode() != ISD::UNDEF ||
18353 V1.getOperand(1).getOpcode() != ISD::UNDEF)
18782 N0->getOperand(0)->getOpcode() != ISD::UNDEF &&
18783 N0->getOperand(1)->getOpcode() != ISD::UNDEF) {
18816 // fold: (shuffle (bitcast (BINOP A, B)), Undef, <Mask>) ->
18817 // (shuffle (BINOP (bitcast A), (bitcast B)), Undef, <Mask>)
18825 N1.getOpcode() == ISD::UNDEF && N0.hasOneUse() &&
19199 // Be sure we emit undef where we can.
19200 if (Cond.getOperand(i)->getOpcode() == ISD::UNDEF)
19562 // don't rely on particular values of undef lanes.
20457 V1.getOperand(0).getOpcode() == ISD::UNDEF &&
20874 // TODO: It is possible to support ZExt by zeroing the undef values
21263 /// operands is UNDEF then the result is UNDEF.
21296 // LHS = VECTOR_SHUFFLE LHS, undef, <0, 1, ..., N-1>
21297 // NOTE: in what follows a default initialized SDValue represents an UNDEF of
21302 if (LHS.getOperand(0).getOpcode() != ISD::UNDEF)
21304 if (LHS.getOperand(1).getOpcode() != ISD::UNDEF)
21309 if (LHS.getOpcode() != ISD::UNDEF)
21320 if (RHS.getOperand(0).getOpcode() != ISD::UNDEF)
21322 if (RHS.getOperand(1).getOpcode() != ISD::UNDEF)
21327 if (RHS.getOpcode() != ISD::UNDEF)
21337 // If everything is UNDEF then bail out: it would be better to fold to UNDEF.
21354 // Ignore any UNDEF components.
21370 LHS = A.getNode() ? A : B; // If A is 'UNDEF', use B for it.
21371 RHS = B.getNode() ? B : A; // If B is 'UNDEF', use A for it.
