Lines Matching refs:f80
322 setCondCodeAction(ISD::SETOEQ, MVT::f80, Expand);
325 setCondCodeAction(ISD::SETUNE, MVT::f80, Expand);
354 // f32 and f64 cases are Legal, f80 case is not
366 // are Legal, f80 is custom lowered.
377 // f32 and f64 cases are Legal, f80 case is not
453 setOperationAction(ISD::BR_CC , MVT::f80, Expand);
460 setOperationAction(ISD::SELECT_CC , MVT::f80, Expand);
473 setOperationAction(ISD::FREM , MVT::f80 , Expand);
549 setOperationAction(ISD::SELECT , MVT::f80 , Custom);
555 setOperationAction(ISD::SETCC , MVT::f80 , Custom);
758 addRegisterClass(MVT::f80, &X86::RFP80RegClass);
759 setOperationAction(ISD::UNDEF, MVT::f80, Expand);
760 setOperationAction(ISD::FCOPYSIGN, MVT::f80, Expand);
777 setOperationAction(ISD::FSIN , MVT::f80, Expand);
778 setOperationAction(ISD::FCOS , MVT::f80, Expand);
779 setOperationAction(ISD::FSINCOS, MVT::f80, Expand);
782 setOperationAction(ISD::FFLOOR, MVT::f80, Expand);
783 setOperationAction(ISD::FCEIL, MVT::f80, Expand);
784 setOperationAction(ISD::FTRUNC, MVT::f80, Expand);
785 setOperationAction(ISD::FRINT, MVT::f80, Expand);
786 setOperationAction(ISD::FNEARBYINT, MVT::f80, Expand);
787 setOperationAction(ISD::FMA, MVT::f80, Expand);
793 setOperationAction(ISD::FPOW , MVT::f80 , Expand);
795 setOperationAction(ISD::FLOG, MVT::f80, Expand);
796 setOperationAction(ISD::FLOG2, MVT::f80, Expand);
797 setOperationAction(ISD::FLOG10, MVT::f80, Expand);
798 setOperationAction(ISD::FEXP, MVT::f80, Expand);
799 setOperationAction(ISD::FEXP2, MVT::f80, Expand);
1926 ValToCopy = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f80, ValToCopy);
2068 // If we prefer to use the value in xmm registers, copy it out as f80 and
2070 if (isScalarFPTypeInSSEReg(VA.getValVT())) CopyVT = MVT::f80;
2076 // Round the f80 to the right size, which also moves it to the appropriate
10944 SDVTList Tys = DAG.getVTList(MVT::f80, MVT::Other);
10969 // Load the value out, extending it from f32 to f80.
10971 SDValue Fudge = DAG.getExtLoad(ISD::EXTLOAD, dl, MVT::f80, DAG.getEntryNode(),
10975 SDValue Add = DAG.getNode(ISD::FADD, dl, MVT::f80, Fild, Fudge);
11462 // type, and that won't be f80 since that is not custom lowered.
13302 if (ArgVT == MVT::f80) {
13303 llvm_unreachable("va_arg for f80 not yet implemented");
19227 VT != MVT::f80 && TLI.isTypeLegal(VT) &&
19939 (FalseOp.getValueType() != MVT::f80 || hasFPCMov(CC))) {
22604 // If SSE is enabled for this VT, use f80 to ensure the isel moves the
