Lines Matching refs:v8f32
1140 addRegisterClass(MVT::v8f32, &X86::VR256RegClass);
1144 setOperationAction(ISD::LOAD, MVT::v8f32, Legal);
1148 setOperationAction(ISD::FADD, MVT::v8f32, Legal);
1149 setOperationAction(ISD::FSUB, MVT::v8f32, Legal);
1150 setOperationAction(ISD::FMUL, MVT::v8f32, Legal);
1151 setOperationAction(ISD::FDIV, MVT::v8f32, Legal);
1152 setOperationAction(ISD::FSQRT, MVT::v8f32, Legal);
1153 setOperationAction(ISD::FFLOOR, MVT::v8f32, Legal);
1154 setOperationAction(ISD::FCEIL, MVT::v8f32, Legal);
1155 setOperationAction(ISD::FTRUNC, MVT::v8f32, Legal);
1156 setOperationAction(ISD::FRINT, MVT::v8f32, Legal);
1157 setOperationAction(ISD::FNEARBYINT, MVT::v8f32, Legal);
1158 setOperationAction(ISD::FNEG, MVT::v8f32, Custom);
1159 setOperationAction(ISD::FABS, MVT::v8f32, Custom);
1174 // (fp_to_int:v8i16 (v8f32 ..)) requires the result type to be promoted
1205 setOperationAction(ISD::SELECT, MVT::v8f32, Custom);
1210 setOperationAction(ISD::VSELECT, MVT::v8f32, Custom);
1226 setOperationAction(ISD::FMA, MVT::v8f32, Legal);
1343 setLoadExtAction(ISD::EXTLOAD, MVT::v8f32, Legal);
1384 setOperationAction(ISD::FP_ROUND, MVT::v8f32, Legal);
1385 setOperationAction(ISD::FP_EXTEND, MVT::v8f32, Legal);
1701 return MVT::v8f32;
1807 case MVT::v32i8: case MVT::v8i32: case MVT::v4i64: case MVT::v8f32:
4027 if (VT != MVT::v8i32 && VT != MVT::v8f32)
4916 Vec = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v8f32, Ops);
5044 V = DAG.getNode(ISD::BITCAST, dl, MVT::v8f32, V);
5045 V = DAG.getVectorShuffle(MVT::v8f32, dl, V, DAG.getUNDEF(MVT::v8f32),
5897 // (extract_vector_elt (v8f32 %vreg1), Constant<6>)
5900 // (extract_subvector (v8f32 %vreg0), Constant<4>),
6241 assert((VT == MVT::v8f32 || VT == MVT::v4f64 || VT == MVT::v4f32 ||
6362 (Subtarget->hasAVX() && (VT == MVT::v8f32 || VT == MVT::v4f64))) {
6406 if ((VT == MVT::v8f32 || VT == MVT::v4f64)) {
6468 if ((VT == MVT::v8f32 || VT == MVT::v4f64 || VT == MVT::v8i32 ||
9547 // Bitcast is for VPERMPS since mask is v8i32 but node takes v8f32
18767 // <0,9,2,11,4,13,6,15> -- for v8f32 shuffles.
18773 (Subtarget->hasAVX() && (VT == MVT::v8f32 || VT == MVT::v4f64))) &&
21384 (Subtarget->hasFp256() && (VT == MVT::v8f32 || VT == MVT::v4f64))) &&
21399 (Subtarget->hasFp256() && (VT == MVT::v8f32 || VT == MVT::v4f64))) &&
22642 case MVT::v8f32:
