Lines Matching refs:v16i8
259 { ISD::SHL, MVT::v16i8, 1 }, // psllw.
264 { ISD::SRL, MVT::v16i8, 1 }, // psrlw.
269 { ISD::SRA, MVT::v16i8, 4 }, // psrlw, pand, pxor, psubb.
314 { ISD::SHL, MVT::v16i8, 30 }, // cmpeqb sequence.
320 { ISD::SRL, MVT::v16i8, 16*10 }, // Scalarized.
325 { ISD::SRA, MVT::v16i8, 16*10 }, // Scalarized.
336 { ISD::SDIV, MVT::v16i8, 16*20 },
340 { ISD::UDIV, MVT::v16i8, 16*20 },
468 // There is no instruction that matches a v16i8 alternate shuffle.
470 {ISD::VECTOR_SHUFFLE, MVT::v16i8, 3}
489 {ISD::VECTOR_SHUFFLE, MVT::v16i8, 3} // pshufb + pshufb + or
509 {ISD::VECTOR_SHUFFLE, MVT::v16i8, 48}
537 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v16i8, 16*10 },
541 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v16i8, 16*10 },
546 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v16i8, 8 },
550 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v16i8, 8 },
569 { ISD::SIGN_EXTEND, MVT::v16i16, MVT::v16i8, 1 },
570 { ISD::ZERO_EXTEND, MVT::v16i16, MVT::v16i8, 1 },
596 { ISD::SIGN_EXTEND, MVT::v16i16, MVT::v16i8, 4 },
597 { ISD::ZERO_EXTEND, MVT::v16i16, MVT::v16i8, 4 },
618 { ISD::TRUNCATE, MVT::v16i8, MVT::v16i16, 4 },
698 { ISD::SETCC, MVT::v16i8, 1 },
