Lines Matching full:declare
20 declare <8 x i8> @llvm.ctpop.v8i8(<8 x i8>) nounwind readnone
21 declare <16 x i8> @llvm.ctpop.v16i8(<16 x i8>) nounwind readnone
71 declare <8 x i8> @llvm.ctlz.v8i8(<8 x i8>, i1) nounwind readnone
72 declare <4 x i16> @llvm.ctlz.v4i16(<4 x i16>, i1) nounwind readnone
73 declare <2 x i32> @llvm.ctlz.v2i32(<2 x i32>, i1) nounwind readnone
75 declare <16 x i8> @llvm.ctlz.v16i8(<16 x i8>, i1) nounwind readnone
76 declare <8 x i16> @llvm.ctlz.v8i16(<8 x i16>, i1) nounwind readnone
77 declare <4 x i32> @llvm.ctlz.v4i32(<4 x i32>, i1) nounwind readnone
127 declare <8 x i8> @llvm.arm.neon.vcls.v8i8(<8 x i8>) nounwind readnone
128 declare <4 x i16> @llvm.arm.neon.vcls.v4i16(<4 x i16>) nounwind readnone
129 declare <2 x i32> @llvm.arm.neon.vcls.v2i32(<2 x i32>) nounwind readnone
131 declare <16 x i8> @llvm.arm.neon.vcls.v16i8(<16 x i8>) nounwind readnone
132 declare <8 x i16> @llvm.arm.neon.vcls.v8i16(<8 x i16>) nounwind readnone
133 declare <4 x i32> @llvm.arm.neon.vcls.v4i32(<4 x i32>) nounwind readnone
